search for: issubclassof

...n code showed that we were rejecting them precisely because the patterns now contain value types instead of register classes (FastISelEmitter.cpp, lines 253ff.): // For now, the only other thing we accept is register operands. const CodeGenRegisterClass *RC = 0; if (OpLeafRec->isSubClassOf("RegisterOperand")) OpLeafRec = OpLeafRec->getValueAsDef("RegClass"); if (OpLeafRec->isSubClassOf("RegisterClass")) RC = &Target.getRegisterClass(OpLeafRec); else if (OpLeafRec->isSubClassOf("Register")) RC = T...

...rejecting them precisely because the patterns now > contain value types instead of register classes (FastISelEmitter.cpp, > lines 253ff.): > > // For now, the only other thing we accept is register operands. > const CodeGenRegisterClass *RC = 0; > if (OpLeafRec->isSubClassOf("RegisterOperand")) > OpLeafRec = OpLeafRec->getValueAsDef("RegClass"); > if (OpLeafRec->isSubClassOf("RegisterClass")) > RC = &Target.getRegisterClass(OpLeafRec); > else if (OpLeafRec->isSubClassOf("Register")...

Hello, Edd > > llvm[3]: Building ARM.td instruction selector implementation with tblgen > > assertion "getOperator()->isSubClassOf("SDNodeXForm") && "Unknown node > > type!"" failed: file "CodeGenDAGPatterns.cpp", line 949, function > > "ApplyTypeConstraints" Could you please try with gcc 4.x and check, whether this problem exists for you or not. -- With best r...

...erifier(Ints, OS); + // Emit the intrinsic declaration generator. + EmitGenerator(Ints, OS); + // Emit mod/ref info for each function. EmitModRefInfo(Ints, OS); @@ -121,6 +124,19 @@ } } +static void EmitTypeGenerate(std::ostream &OS, Record *ArgType) { + if (ArgType->isSubClassOf("LLVMIntegerType")) { + OS << "IntegerType::get(" << ArgType->getValueAsInt("Width") << ")"; + } else if (ArgType->isSubClassOf("LLVMPackedType")) { + OS << "PackedType::get("; + EmitTypeGenerate(OS,...

...ter::EmitTypeGenerate, called from IntrinsicEmitter::EmitGenerator, here for (unsigned j = 0; j != N; ++j) { OS << " ArgTys.push_back("; EmitTypeGenerate(OS, ParamTys[j], ArgNo); OS << ");\n"; } I'm hitting this assertion: if (ArgType->isSubClassOf("LLVMMatchType")) { unsigned Number = ArgType->getValueAsInt("Number"); assert(Number < ArgNo && "Invalid matching number!"); Where both Number and ArgNo are 1. -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-boun...

...se the patterns now > > contain value types instead of register classes (FastISelEmitter.cpp, > > lines 253ff.): > > > > // For now, the only other thing we accept is register operands. > > const CodeGenRegisterClass *RC = 0; > > if (OpLeafRec->isSubClassOf("RegisterOperand")) > > OpLeafRec = OpLeafRec->getValueAsDef("RegClass"); > > if (OpLeafRec->isSubClassOf("RegisterClass")) > > RC = &Target.getRegisterClass(OpLeafRec); > > else if (OpLeafRec->isSubClassOf(&...

Hi there, I am a student considering a compiler design based dissertation with llvm. I am having problems building llvm on OpenBSD-current. I hope to make a port of llvm for OpenBSD once I have figured out how to build it. Observe: llvm[3]: Compiling Deserialize.cpp for Release build In file included from /home/edd/llvm/llvm-2.3/include/llvm/Bitcode/BitstreamRead er.h:18, from

...at 7:02 PM, Edd Barrett <vext01 at gmail.com> wrote: > gcc4.2 works fine. But it only works fine for svn snapshots. Your most recent release does not build on OpenBSD with gcc-4.2. llvm[3]: Building ARM.td instruction selector implementation with tblgen assertion "getOperator()->isSubClassOf("SDNodeXForm") && "Unknown node type!"" failed: file "CodeGenDAGPatterns.cpp", line 932, function "ApplyTypeConstraints" gmake[3]: *** [/usr/ports/devel/llvm/w-llvm-2.3/llvm-2.3/lib/Target/ARM/Release/ARMGenDAGISel.inc.tmp] Abort trap (core dumpe...

On Mon, 5 Feb 2007, Dan Gohman wrote: > LLVM knows what all the types of the intrinsic functions are; I thought, > why are users (including llvm-gcc...) required to duplicate all this > information in order to use them? I mean in order to call > getOrInsertFunction to get declarations for them. That is an excellent question! :) In the bad old days, we used to allow intrinsics

...gt; IntrinsicEmitter::EmitGenerator, here > for (unsigned j = 0; j != N; ++j) { > OS << " ArgTys.push_back("; > EmitTypeGenerate(OS, ParamTys[j], ArgNo); > OS << ");\n"; > } > I'm hitting this assertion: > if (ArgType->isSubClassOf("LLVMMatchType")) { > unsigned Number = ArgType->getValueAsInt("Number"); > assert(Number < ArgNo && "Invalid matching number!"); > > Where both Number and ArgNo are 1. > > -----Original Message----- > From: llvmdev-bounces at c...

...erifier(Ints, OS); + // Emit the intrinsic declaration generator. + EmitGenerator(Ints, OS); + // Emit mod/ref info for each function. EmitModRefInfo(Ints, OS); @@ -121,6 +124,25 @@ } } +static void EmitTypeGenerate(std::ostream &OS, Record *ArgType) { + if (ArgType->isSubClassOf("LLVMIntegerType")) { + OS << "IntegerType::get(" << ArgType->getValueAsInt("Width") << ")"; + } else if (ArgType->isSubClassOf("LLVMPackedType")) { + OS << "PackedType::get("; + EmitTypeGenerate(OS,...

...fset", (BEQ ZERO, ZERO, brtarget:$offset)>; The code which decides not to include this alias is located near line 856 in AsmWriterEmitter.cpp: for (unsigned i = 0, e = LastOpNo; i != e; ++i) { ... switch (RO.Kind) { case CodeGenInstAlias::ResultOperand::K_Record: { ... if (Rec->isSubClassOf("RegisterClass")) { ... } else { assert(Rec->isSubClassOf("Operand") && "Unexpected operand!"); // <- line 856 // FIXME: We may need to handle these situations. delete IAP; IAP = 0; CantHandle = true; ... My question is, what...

On Thu, Jun 12, 2008 at 11:41 AM, Anton Korobeynikov <asl at math.spbu.ru> wrote: > Hello, Edd > >> > llvm[3]: Building ARM.td instruction selector implementation with tblgen >> > assertion "getOperator()->isSubClassOf("SDNodeXForm") && "Unknown node >> > type!"" failed: file "CodeGenDAGPatterns.cpp", line 949, function >> > "ApplyTypeConstraints" > Could you please try with gcc 4.x and check, whether this problem exists > for you or not...

...lementation with tblgen llvm[3]: Building ARM.td instruction names with tblgen llvm[3]: Building ARM.td instruction information with tblgen llvm[3]: Building ARM.td assembly writer with tblgen llvm[3]: Building ARM.td instruction selector implementation with tblgen assertion "getOperator()->isSubClassOf("SDNodeXForm") && "Unknown node type!"" failed: file "CodeGenDAGPatterns.cpp", line 949, function "ApplyTypeConstraints" gmake[3]: *** [/tmp/llvm/lib/Target/ARM/Debug/ARMGenDAGISel.inc.tmp] Abort trap (core dumped) gmake[3]: Leaving directory `/t...

...at gmail.com> wrote: > > gcc4.2 works fine. > > But it only works fine for svn snapshots. Your most recent release > does not build on OpenBSD with gcc-4.2. > > llvm[3]: Building ARM.td instruction selector implementation with tblgen > assertion "getOperator()->isSubClassOf("SDNodeXForm") && "Unknown node > type!"" failed: file "CodeGenDAGPatterns.cpp", line 932, function > "ApplyTypeConstraints" > gmake[3]: *** [/usr/ports/devel/llvm/w-llvm-2.3/llvm-2.3/lib/Target/ARM/Release/ARMGenDAGISel.inc.tmp] > Ab...

...t 50% of the time when it feels like it: #1 0x04e521a3 in abort () at /usr/src/lib/libc/stdlib/abort.c:68 #2 0x04df29d7 in __assert2 (file=0x3c0018e1 "CodeGenDAGPatterns.cpp", line=934, func=0x3c0020a6 "ApplyTypeConstraints", failedexpr=0x3c002400 "getOperator()->isSubClassOf(\"SDNodeXForm\") && \"Unknown node type!\"") at /usr/src/lib/libc/gen/assert.c:52 #3 0x1c0d0bcd in llvm::TreePatternNode::ApplyTypeConstraints (this=0x7dfc0700, TP=@0x7c0fb6c0, NotRegisters=false) at CodeGenDAGPatterns.cpp:934 #4 0x1c0cfb6b in llvm::TreePatternNod...

...mpleValueType CodeGenInstruction:: HasOneImplicitDefWithKnownVT(const CodeGenTarget &TargetInfo) const { if (ImplicitDefs.empty()) return MVT::Other; // Check to see if the first implicit def has a resolvable type. Record *FirstImplicitDef = ImplicitDefs[0]; assert(FirstImplicitDef->isSubClassOf("Register")); const std::vector<MVT::SimpleValueType> &RegVTs = TargetInfo.getRegisterVTs(FirstImplicitDef); if (RegVTs.size() == 1) return RegVTs[0]; return MVT::Other; }

...itGenerator, here >> for (unsigned j = 0; j != N; ++j) { >> OS << " ArgTys.push_back("; >> EmitTypeGenerate(OS, ParamTys[j], ArgNo); >> OS << ");\n"; >> } >> I'm hitting this assertion: >> if (ArgType->isSubClassOf("LLVMMatchType")) { >> unsigned Number = ArgType->getValueAsInt("Number"); >> assert(Number < ArgNo && "Invalid matching number!"); >> >> Where both Number and ArgNo are 1. >> >> -----Original Message----- >>...

I have this intrinsic definition for llvm. def int_opencl_math_fdistance_fast : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty, LLVMMatchType<0>]>; Can someone explain what LLVMMatchType does and how to specify it to match the first argument and not the return value? I've tried LLVMMatchType<1> but it fails in IntrinsicEmitter.cpp

On Apr 15, 2009, at 9:29 AM, Villmow, Micah wrote: > I have this intrinsic definition for llvm. > def int_opencl_math_fdistance_fast : Intrinsic<[llvm_float_ty], > [llvm_anyfloat_ty, LLVMMatchType<0>]>; > > > Can someone explain what LLVMMatchType does and how to specify it > to match the first argument and not the return value?