Displaying 8 results from an estimated 8 matches for "isshufpmask".
2009 Dec 17
2
[LLVMdev] AVX Shuffles & PatLeaf Help Needed
I'm working on debugging AVX shuffles and I ran into an interesting
problem.
The current isSHUFPMask predicate in X86ISelLowering needs to be
generalized to operate on 128-bit or 256-bit masks. There are
probably lots of other things to change too (LowerVECTOR_SHUFFLE_4wide,
etc.) but I'll worry about that later.
The generalized rule is:
1. For the low 64 bits of the result vector, the sour...
2011 Mar 27
2
[LLVMdev] Long-Term ISel Design
...f the matching
> code would end up as C++ code in X86ISelDagToDag, which would give us
> all of the problems we had before by moving to X86ISD nodes.
Actually, it would be matching code in X86ISelLowering, in the form
of is.*Mask. For example:
In X86ISelLowering.cpp:
bool X86ISelLowering::isSHUFPMask(...) {
...
}
unsigned X86::getShuffleSHUFImmediate(SDNode *N) {
...
}
In X86InstrFragmentsSIMD.td:
def SHUFFLE_get_shuf_imm : SDNodeXForm<vector_shuffle, [{
return getI8Imm(X86::getShuffleSHUFImmediate(N));
}]>;
def shufp : PatFrag<(ops node:$lhs, node:$rhs),
(v...
2006 Mar 28
1
[LLVMdev] CVS broken in X86ISelLowering.cpp.
...llvm/lib/Target/X86/X86ISelLowering.cpp,v
retrieving revision 1.139
diff -a -u -r1.139 X86ISelLowering.cpp
--- X86ISelLowering.cpp 28 Mar 2006 08:27:15 -0000 1.139
+++ X86ISelLowering.cpp 28 Mar 2006 08:47:58 -0000
@@ -2609,5 +2609,5 @@
X86::isPSHUFDMask(Mask.Val) ||
X86::isSHUFPMask(Mask.Val) ||
X86::isUNPCKLMask(Mask.Val) ||
- X86::isUNPCKHMask(Mask.Val);
+ X86::isUNPCKHMask(Mask.Val));
}
cheers
Ramana
2011 Mar 18
0
[LLVMdev] Long-Term ISel Design
On Mar 17, 2011, at 9:32 AM, David A. Greene wrote:
> Chris Lattner <clattner at apple.com> writes:
>>> 1. We have special target-specific operators for certain shuffles in X86,
>>> such as X86unpckl.
>
>> It also eliminates a lot of fragility. Before doing this, X86
>> legalize would have to be very careful to specifically form shuffles
>> that
2011 Mar 17
2
[LLVMdev] Long-Term ISel Design
Chris Lattner <clattner at apple.com> writes:
>> 1. We have special target-specific operators for certain shuffles in X86,
>> such as X86unpckl.
> It also eliminates a lot of fragility. Before doing this, X86
> legalize would have to be very careful to specifically form shuffles
> that it knew isel would turn into (e.g.) unpck operations. Now
> instead of
2011 Apr 09
0
[LLVMdev] Long-Term ISel Design
...SmallVectorImpl<int> &M,
> EVT VT) const {
> // FIXME: pshufb, blends, shifts.
> return (VT.getVectorNumElements() == 2 ||
> ShuffleVectorSDNode::isSplatMask(&M[0], VT) ||
> isMOVLMask(M, VT) ||
> isSHUFPMask(M, VT) ||
> ...
> }
>
> We git rid of this call to isSHUFPMask, which currently happens during
> legalize. Instead of trying to see if shuffles are already legal, just
> run the isntruction selector and see what it can find. For everything
> else, we know by definit...
2009 Dec 17
0
[LLVMdev] AVX Shuffles & PatLeaf Help Needed
On Dec 17, 2009, at 3:10 PM, David Greene wrote:
> I'm working on debugging AVX shuffles and I ran into an interesting
> problem.
>
> The current isSHUFPMask predicate in X86ISelLowering needs to be
> generalized to operate on 128-bit or 256-bit masks. There are
> probably lots of other things to change too (LowerVECTOR_SHUFFLE_4wide,
> etc.) but I'll worry about that later.
>
> The generalized rule is:
>
> 1. For the low 64...
2010 Aug 04
2
[LLVMdev] x86 Vector Shuffle Patterns
...128:$dst,
(v4f32 (shufp:$src3 VR128:$src1, VR128:$src2)))]>;
"shufp" is the magic bit here. It's definition looks like this:
def shufp : PatFrag<(ops node:$lhs, node:$rhs),
(vector_shuffle node:$lhs, node:$rhs), [{
return X86::isSHUFPMask(cast<ShuffleVectorSDNode>(N));
}], SHUFFLE_get_shuf_imm>;
First off, why does the vector_shuffle pattern take only two operands?
I understand that the VECTOR_SHUFFLE node has three operands but
vector_shuffle is defined as:
def SDTVecShuffle : SDTypeProfile<1, 2, [
SDTCisSameAs<0...