search for: issamesize

Displaying 4 results from an estimated 4 matches for "issamesize".

2006 Oct 01
2
[LLVMdev] Instruction descriptions question
...hould be the same. Wouldn't it be possible and even more clean to have just one description like (I use a pseudo-description here): def MOVrr : I<0x88, MRMDestReg, (ops (GR8|GR16|GR32) :$dst, (i8mem|i16mem|i32mem):$src), "mov{b} {$src, $dst|$dst, $src}", []>, isSameSize($dst, $src); The semantic of such a description would mean that $dst should be one of GR8, GR16, GR32 and $dst is one of i8mem, i16mem, i32mem with the additional constraint that the sizes of both operands are the same (this is checked by isSameSize predicate). More over, in very many cases, the...
2006 Oct 02
0
[LLVMdev] Instruction descriptions question
...uldn't it be possible and even more clean to have just one > description like (I use a pseudo-description here): > > def MOVrr : I<0x88, MRMDestReg, (ops (GR8|GR16|GR32) :$dst, > (i8mem|i16mem|i32mem):$src), > "mov{b} {$src, $dst|$dst, $src}", []>, isSameSize($dst, > $src); We already have something like this, but it's a little more general. The X86 backend hasn't been converted to use it. This is the 'multiclass' facility in tblgen: http://llvm.org/docs/TableGenFundamentals.html#multiclass Basically this lets you use one defini...
2006 Oct 02
2
[LLVMdev] Instruction descriptions question
...sible and even more clean to have just one >> description like (I use a pseudo-description here): >> >> def MOVrr : I<0x88, MRMDestReg, (ops (GR8|GR16|GR32) :$dst, >> (i8mem|i16mem|i32mem):$src), >> "mov{b} {$src, $dst|$dst, $src}", []>, isSameSize($dst, >> $src); > > We already have something like this, but it's a little more general. The > X86 backend hasn't been converted to use it. Any plans to do it, to make things simpler? > This is the 'multiclass' > facility in tblgen: > http://llvm.org/d...
2006 Oct 02
0
[LLVMdev] Instruction descriptions question
...to have just one >>> description like (I use a pseudo-description here): >>> >>> def MOVrr : I<0x88, MRMDestReg, (ops (GR8|GR16|GR32) :$dst, >>> (i8mem|i16mem|i32mem):$src), >>> "mov{b} {$src, $dst|$dst, $src}", []>, > isSameSize($dst, >>> $src); >> >> We already have something like this, but it's a little more general. >> The X86 backend hasn't been converted to use it. > > Any plans to do it, to make things simpler? It would be nice, but noone has stepped up to do it yet. It'...