Displaying 3 results from an estimated 3 matches for "isregorsuperreg".
2015 Dec 04
2
analyzePhysReg question
...kill. Some bits from the live-in value may pass through into the live-out value.
Looking into the code for anaylzePhysReg, I think the code looks like it intends for Defines to truly mean Reg or a super-register of Reg is defined, not any overlapping Reg is defined.
The code looks like this:
bool IsRegOrSuperReg = MOReg == Reg || TRI->isSuperRegister(MOReg, Reg);
...
if (IsRegOrSuperReg) {
PRI.Defines = true; // Reg or a super-register is defined.
if (!MO.isDead())
AllDefsDead = false;
}
I think the fundamental bug here is that the operands are swapped when passed into isSuperRegister. The...
2015 Dec 04
2
analyzePhysReg question
...kill. Some bits from the live-in value may pass through into the live-out value.
Looking into the code for anaylzePhysReg, I think the code looks like it intends for Defines to truly mean Reg or a super-register of Reg is defined, not any overlapping Reg is defined.
The code looks like this:
bool IsRegOrSuperReg = MOReg == Reg || TRI->isSuperRegister(MOReg, Reg);
...
if (IsRegOrSuperReg) {
PRI.Defines = true; // Reg or a super-register is defined.
if (!MO.isDead())
AllDefsDead = false;
}
I think the fundamental bug here is that the operands are swapped when passed into isSuperRegister. The...
2015 Dec 04
2
analyzePhysReg question
> On Dec 3, 2015, at 5:36 PM, Quentin Colombet via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
>>
>> On Dec 3, 2015, at 5:11 PM, Smith, Kevin B <kevin.b.smith at intel.com <mailto:kevin.b.smith at intel.com>> wrote:
>>
>>
>>
>>> -----Original Message-----
>>> From: Quentin Colombet [mailto:qcolombet at apple.com