search for: isoptionaldef

...and. > unsigned VReg = getVR(Op, VRBaseMap); > assert(TargetRegisterInfo::isVirtualRegister(VReg) && "Not a vreg?"); > const MCInstrDesc &MCID = MIB->getDesc(); > bool isOptDef = IIOpNum < MCID.getNumOperands() && > MCID.OpInfo[IIOpNum].isOptionalDef(); > // If the instruction requires a register in a different class, create > // a new virtual register and copy the value into it, but first attempt to > // shrink VReg's register class within reason. For example, if VReg == GR32 > // and II requires a GR32_NOSP, just cons...

...gned VReg = getVR(Op, VRBaseMap); >> assert(TargetRegisterInfo::isVirtualRegister(VReg) && "Not a vreg?"); >> const MCInstrDesc &MCID = MIB->getDesc(); >> bool isOptDef = IIOpNum < MCID.getNumOperands() && >> MCID.OpInfo[IIOpNum].isOptionalDef(); >> // If the instruction requires a register in a different class, create >> // a new virtual register and copy the value into it, but first attempt >> to >> // shrink VReg's register class within reason. For example, if VReg == >> GR32 >> // and...

...gned VReg = getVR(Op, VRBaseMap); >> assert(TargetRegisterInfo::isVirtualRegister(VReg) && "Not a vreg?"); >> const MCInstrDesc &MCID = MIB->getDesc(); >> bool isOptDef = IIOpNum < MCID.getNumOperands() && >> MCID.OpInfo[IIOpNum].isOptionalDef(); >> // If the instruction requires a register in a different class, create >> // a new virtual register and copy the value into it, but first attempt to >> // shrink VReg's register class within reason. For example, if VReg == GR32 >> // and II requires a GR32...

> On Aug 24, 2015, at 1:30 PM, Ryan Taylor <ryta1203 at gmail.com> wrote: > > I'm trying to do something like this: > > // Dst = NewVReg's reg class > // *II = MCInstrDesc > // IIOpNum = II Operand Num > > if (TRI->getCommonSubClass(DstRC, TRI->getRegClass(II->OpInfo[IIOpNum].RegClass)) == DstRC) > MRI->setRegClass(VReg, DstRC); >

...(VReg) && "Not a >>>>>>> vreg?"); >>>>>>> const MCInstrDesc &MCID = MIB->getDesc(); >>>>>>> bool isOptDef = IIOpNum < MCID.getNumOperands() && >>>>>>> MCID.OpInfo[IIOpNum].isOptionalDef(); >>>>>>> // If the instruction requires a register in a different class, >>>>>>> create >>>>>>> // a new virtual register and copy the value into it, but first >>>>>>> attempt to >>>>>>>...

...; "Not a >>>>>>>> vreg?"); >>>>>>>> const MCInstrDesc &MCID = MIB->getDesc(); >>>>>>>> bool isOptDef = IIOpNum < MCID.getNumOperands() && >>>>>>>> MCID.OpInfo[IIOpNum].isOptionalDef(); >>>>>>>> // If the instruction requires a register in a different class, >>>>>>>> create >>>>>>>> // a new virtual register and copy the value into it, but first >>>>>>>> attempt to >>>&g...

...t;>>>>>>>> vreg?"); >>>>>>>>> const MCInstrDesc &MCID = MIB->getDesc(); >>>>>>>>> bool isOptDef = IIOpNum < MCID.getNumOperands() && >>>>>>>>> MCID.OpInfo[IIOpNum].isOptionalDef(); >>>>>>>>> // If the instruction requires a register in a different class, >>>>>>>>> create >>>>>>>>> // a new virtual register and copy the value into it, but first >>>>>>>>> attempt t...

...t;>>>>> vreg?"); >>>>>>>>>> const MCInstrDesc &MCID = MIB->getDesc(); >>>>>>>>>> bool isOptDef = IIOpNum < MCID.getNumOperands() && >>>>>>>>>> MCID.OpInfo[IIOpNum].isOptionalDef(); >>>>>>>>>> // If the instruction requires a register in a different class, >>>>>>>>>> create >>>>>>>>>> // a new virtual register and copy the value into it, but first >>>>>>>>&g...

...t;>> vreg?"); >>>>>>>>>>> const MCInstrDesc &MCID = MIB->getDesc(); >>>>>>>>>>> bool isOptDef = IIOpNum < MCID.getNumOperands() && >>>>>>>>>>> MCID.OpInfo[IIOpNum].isOptionalDef(); >>>>>>>>>>> // If the instruction requires a register in a different >>>>>>>>>>> class, create >>>>>>>>>>> // a new virtual register and copy the value into it, but >>>>>>>...