Displaying 3 results from an estimated 3 matches for "isnotnegativeusingshift".
2019 Nov 13
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
...veUsingCmp(short x) {
return x > -1;
}
Currently, we will canonicalize these to the shift form (but you could
argue that is backwards).
Alive proof for logical equivalence:
https://rise4fun.com/Alive/uGH
If we disable the instcombine for this, we would have IR like this:
define signext i16 @isNotNegativeUsingShift(i16 signext %x) {
%signbit = lshr i16 %x, 15
%r = xor i16 %signbit, 1
ret i16 %r
}
define signext i16 @isNotNegativeUsingCmp(i16 signext %x) {
%cmp = icmp sgt i16 %x, -1
%r = zext i1 %cmp to i16
ret i16 %r
}
And compile that for MSP430:
$ ./llc -o - -mtriple=msp430 shift.ll
isNotNegat...
2019 Nov 14
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
...}
>
> Currently, we will canonicalize these to the shift form (but you could
> argue that is backwards).
> Alive proof for logical equivalence:
> https://rise4fun.com/Alive/uGH
>
> If we disable the instcombine for this, we would have IR like this:
>
> define signext i16 @isNotNegativeUsingShift(i16 signext %x) {
> %signbit = lshr i16 %x, 15
> %r = xor i16 %signbit, 1
> ret i16 %r
> }
>
> define signext i16 @isNotNegativeUsingCmp(i16 signext %x) {
> %cmp = icmp sgt i16 %x, -1
> %r = zext i1 %cmp to i16
> ret i16 %r
> }
>
> And compile that fo...
2019 Nov 13
2
[AVR] [MSP430] Code gen improvements for 8 bit and 16 bit targets
On Wed, Nov 13, 2019 at 12:26 PM Joan Lluch via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>
> Hi All,
>
> In relation to the subject of this message I got my first round of patches successfully reviewed and committed. As a matter of reference, they are the following:
>
> https://reviews.llvm.org/D69116
> https://reviews.llvm.org/D69120
>