search for: isloaded

Hi, for 'affxparser' (Bioconductor), we needed a function to test if a certain package was loaded or not, but we did not want to load it if it wasn't, which is why we couldn't use require(). We came up with the following solution: isPackageLoaded <- function(package, version=NULL, ...) { s <- search(); if (is.null(version)) { s <-

Yes, I'm not arguing that there is a dependence, just that it's not a clobber dependence. The case of a load is already considered earlier in that function and with isLoad == false it returns MemDepResult::getDef(). My question is: why should a read-only call (which yields AliasAnalysis::Ref and is handled in this code fragment) be any different from e.g. a load. Isn't a read-only

Hello, I'm taking a really good look at the MemoryDependenceAnalysis pass, but I'm slightly confused about one little thing. I think it's a bug but I'm not confident enough to submit a bug report. Is there a reason why read-only calls are considered to "clobber" pointers in the non-load case (which is what gets returned due to the fall-through in the switch -- see

Since isLoad == false means we're looking at a store, what this does is making the store *p depend on the load *p. This is correct -- you can't move store before load, otherwise load will start returning a different value. Eugene On Fri, Jul 16, 2010 at 5:43 PM, Marc de Kruijf <dekruijf at cs.wisc.edu> wrote: > Hello, > > I'm taking a really good look at the

Sorry, I misunderstood the question. The difference between a load and a read-only call is that load can be used as the value of the memory location. E.g. DeadStoreElimination pass removes a store that stores a just loaded value back into the same location. To do this it checks if the stored value is the value of load. Read-only call cannot be used like this. This being said, I don't know if

I have a set of changes that enhances rematerialization to handle more kinds of loads, specifically loads with multiple address registers. This is a big win for some codes on x86. I plan to send these up ASAP but I want to solicit a bit of guidance first. The change requires that live interval analysis be able to determine whether and instruction is a load and whether an instruction writes to

Howdy, I'm working on writing a dependence analyzer (rather like what LoopDependenceAnalysis wants to be, except a bit more general). While this is a problem of many parts, I'm currently focusing on finding pairs of memory references to test for dependence. Consider this contrived C code: double test2(int n, double *restrict A, double *restrict B, bool flag) { if (flag) { A[0] =

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On Jan 7, 2014, at 10:47 AM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote: > > On Jan 7, 2014, at 10:40 AM, Evan Cheng <evan.cheng at apple.com> wrote: > >> >> On Dec 30, 2013, at 8:40 PM, Chris Lattner <clattner at apple.com> wrote: >> >>> >>> On Dec 30, 2013, at 4:17 PM, Hal Finkel <hfinkel at anl.gov> wrote:

I"m getting build errors I think from one of your patches O tjoml. You need to have a build area that builds with clang and does warnings as errors to avoid these issues on putback. here is my configure step for example: /home/rkotler/llvm_trunk/configure --enable-werror --prefix=/home/rkotler/ll vm/install CC=/home/rkotler/llvm_3_2/install/bin/clang CXX=/home/rkotler/llvm_3_

Based on function names and structures, this is some version of GCC :) Any way you can post the entire .ll file? Because it's globalsmodref, it's hard to debug without the other functions, since it goes over all the functions to determine address takenness, etc :) On Tue, Jul 21, 2015 at 3:23 PM, Michael Zolotukhin <mzolotukhin at apple.com> wrote: > Hi Chandler, > > We

Hi Quentin, I get following error from MachineVerifier: # End machine code for function f. *** Bad machine code: Missing mayLoad flag *** which comes from: // Check the MachineMemOperands for basic consistency. for (MachineMemOperand *Op : MI->memoperands()) { if (Op->isLoad() && !MI->mayLoad()) report("Missing mayLoad flag", MI); if (Op->isStore()

It is r195843 and fixed in r195905, FYI. 2013/11/29 Reed Kotler <rkotler at mips.com>: > I"m getting build errors I think from one of your patches O tjoml. > > You need to have a build area that builds with clang and does warnings as > errors to avoid these issues on putback. > > here is my configure step for example: > /home/rkotler/llvm_trunk/configure

I'm still seeing this problem. On 11/28/2013 09:37 AM, NAKAMURA Takumi wrote: > It is r195843 and fixed in r195905, FYI. > > 2013/11/29 Reed Kotler <rkotler at mips.com>: >> I"m getting build errors I think from one of your patches O tjoml. >> >> You need to have a build area that builds with clang and does warnings as >> errors to avoid these

On Fri, Jul 17, 2015 at 9:13 AM Evgeny Astigeevich < evgeny.astigeevich at arm.com> wrote: > It’s Dhrystone. > Dhrystone has historically not been a good indicator of real-world performance fluctuations, especially at this small of a shift. I'd like to see if we see any fluctuation on larger and more realistic application benchmarks. One advantage of the flag being set is that we

On Monday 14 September 2009 13:07, Dan Gohman wrote: > MachineMemOperands for spill slots use FixedStack PseudoSourceValues > as their base. There's a unique FixedStack PseudoSourceValue for each > fixed frame object, so it's independent of whether frame pointer > elimination has been done, and it's independent of the actual frame > offsets. >From

On Monday 14 September 2009 15:28, David Greene wrote: > I don't see PseudoSourceValue::FPRel, etc. defined anywhere. How do I know > if a PseudoSourceValue is from the stack? Ok, the comment is misleading. I see the class defined in PseudoSourceValue.cpp now. I'll move it to the header. I have another question. Looking at the list of MachineMemOperands for an instruction, is

The following is the code fragment after "# *** IR Dump Before Prolog/Epilog Insertion & Frame Finalization ***:". * MOV32mi <fi#2>, 1, %reg0, 0, %reg0, 0 * * MOV32mr <fi#2>, 1, %reg0, 0, %reg0, %ECX<kill>* * %EAX<def> = MOV32rm <fi#2>, 1, %reg0, 0, %reg0* * MOV32mr %reg0, 1, %reg0, <ga:@one+4>, %reg0, %EAX<kill>* * %EAX<def> = MOV32rm

Hi All, I've more or less finished updating the examples to the DAG style we were talking about. Hopefully I haven't forgotten anything, there was a lot to keep track of :-). Overall, I think there's a couple places where things get a a little awkward (mainly debug info) but things generally look good to me. A Simple Example def : GICombineRule<(defs reg:$D, reg:$S),

On Mon, 2005-09-05 at 14:45 +0800, Tzu-Chien Chiu wrote: > why there is no general dependency analysis for the "machin code"? > perhaps it's because the instruction scheduling is only implemented > for sparcv9? Most backends use the SelectionDAG infastructure to do this kind of thing. (Simplifying things a bit) Each basic block is selected to a DAG based IR. Then