search for: isload

Hi, for 'affxparser' (Bioconductor), we needed a function to test if a certain package was loaded or not, but we did not want to load it if it wasn't, which is why we couldn't use require(). We came up with the following solution: isPackageLoaded <- function(package, version=NULL, ...) { s <- search(); if (is.null(version)) { s <-

Yes, I'm not arguing that there is a dependence, just that it's not a clobber dependence. The case of a load is already considered earlier in that function and with isLoad == false it returns MemDepResult::getDef(). My question is: why should a read-only call (which yields AliasAnalysis::Ref and is handled in this code fragment) be any different from e.g. a load. Isn't a read-only call effectively just a series of loads from a memory-dependence perspective? I...

...t ONLY // modify the pointer. if (InvariantTag) continue; return MemDepResult::getClobber(Inst); case AliasAnalysis::Ref: // If the call is known to never store to the pointer, and if this is a // load query, we can safely ignore it (scan past it). if (isLoad) continue; +++ return MemDepResult::getDef(Inst); default: // Otherwise, there is a potential dependence. Return a clobber. return MemDepResult::getClobber(Inst); } If this seems right to you too, I've attached the patch. If this isn't right, can some...

Since isLoad == false means we're looking at a store, what this does is making the store *p depend on the load *p. This is correct -- you can't move store before load, otherwise load will start returning a different value. Eugene On Fri, Jul 16, 2010 at 5:43 PM, Marc de Kruijf <dekruijf at cs.wisc....

...be MustAlias. Eugene On Sun, Jul 18, 2010 at 2:50 AM, Marc de Kruijf <dekruijf at cs.wisc.edu> wrote: > Yes, I'm not arguing that there is a dependence, just that it's not a > clobber dependence.  The case of a load is already considered earlier in > that function and with isLoad == false it returns MemDepResult::getDef(). >  My question is:  why should a read-only call (which yields > AliasAnalysis::Ref and is handled in this code fragment) be any different > from e.g. a load.  Isn't a read-only call effectively just a series of loads > from a memory-depend...

...s on x86. I plan to send these up ASAP but I want to solicit a bit of guidance first. The change requires that live interval analysis be able to determine whether and instruction is a load and whether an instruction writes to memory. Here's how I've handled these two questions: - Add an isLoad member to TargetInstrInfo with a corresponding implementation in the X86 target consisting of a switch on all of the load-type opcodes. By default isLoad returns false so that false negatives are possible. - Add a writesMemory member to TargetInstrInfo with a corresponding implementation...

...ot;clobber " << *(d.getInst()); if (d.isDef()) errs() << "def " << *(d.getInst()); if (d.isNonLocal()) { errs() << "\tnot defined in this block\n"; BasicBlock *bb = i->getParent(); SmallVectorImpl<NonLocalDepResult> result(4); bool isLoad = false; AliasAnalysis::Location loc; if (StoreInst *store = dyn_cast<StoreInst>(i)) loc = AA->getLocation(store); else if (LoadInst *load = dyn_cast<LoadInst>(i)) { loc = AA->getLocation(load); isLoad = true; } else errs() << "pow!"; M...

Hi, I am loading prototype dynamically using the following js: var scr=document.createElement(''script''); scr.setAttribute("type","text/javascript"); scr.setAttribute("src","./static/js/lib/prototype.js"); document.getElementsByTagName("head") [0].appendChild(scr); on IE6

...It’s reasonably common to have a multi class that is reused for a number of different instructions, say different types of load. Some of the instantiations of the class have a pattern (say a normal i32 load) and some don’t (load of an illegal type, for example). In this case, you need to set the isLoad flag on the defs in the multiclass in order the make sure the latter get it properly, but you’ll get warnings (errors?) from tblgen about redundant flags on the former. The typical workaround is to duplicate the multiclass for with-flags and without-flags, which is even more useless duplication th...

...fixed: case AArch64::LD4LN_WB_S_register: > - TransferBytes = 12; break; > + TransferBytes = 16; break; > case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register: > - TransferBytes = 24; break; > + TransferBytes = 32; break; > } > IsLoad = true; > NumVecs = 4; > > Modified: llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt?rev=195903&r1=195902&r2=195903&view=diff > ===================...

...nalysis::getModRefInfo(this=0x000000010eba5c30, > S=0x000000010a1a22e0, Loc=0x00007fff5fbf6268) + 120 at AliasAnalysis.cpp:288 > frame #3: 0x0000000103a0a814 > libLTO.dylib`llvm::MemoryDependenceAnalysis::getPointerDependencyFrom(this=0x000000010e6cf0c0, > MemLoc=0x00007fff5fbf6268, isLoad=true, ScanIt=llvm::BasicBlock::iterator at > 0x00007fff5fbf4390, BB=0x000000010a19ffa0, QueryInst=0x000000010a1a20c8) + > 1908 at MemoryDependenceAnalysis.cpp:570 > frame #4: 0x0000000103a0ffa5 > libLTO.dylib`llvm::MemoryDependenceAnalysis::GetNonLocalInfoForBlock(this=0x000000010e6...

Hi Quentin, I get following error from MachineVerifier: # End machine code for function f. *** Bad machine code: Missing mayLoad flag *** which comes from: // Check the MachineMemOperands for basic consistency. for (MachineMemOperand *Op : MI->memoperands()) { if (Op->isLoad() && !MI->mayLoad()) report("Missing mayLoad flag", MI); if (Op->isStore() && !MI->mayStore()) report("Missing mayStore flag", MI); } The MI is ARM::tBL, and it doesn't have mayLoad set, which hits the assert in MachineVerifier, si...

...B_S_register: >> - TransferBytes = 12; break; >> + TransferBytes = 16; break; >> case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register: >> - TransferBytes = 24; break; >> + TransferBytes = 32; break; >> } >> IsLoad = true; >> NumVecs = 4; >> >> Modified: llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt >> URL: >> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt?rev=195903&r1=195902&r2=195903&view=diff...

...TransferBytes = 12; break; >>> + TransferBytes = 16; break; >>> case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register: >>> - TransferBytes = 24; break; >>> + TransferBytes = 32; break; >>> } >>> IsLoad = true; >>> NumVecs = 4; >>> >>> Modified: llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt >>> URL: >>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AArch64/neon-instructions.txt?rev=195903&r1=195902&r2...

On Fri, Jul 17, 2015 at 9:13 AM Evgeny Astigeevich < evgeny.astigeevich at arm.com> wrote: > It’s Dhrystone. > Dhrystone has historically not been a good indicator of real-world performance fluctuations, especially at this small of a shift. I'd like to see if we see any fluctuation on larger and more realistic application benchmarks. One advantage of the flag being set is that we

On Monday 14 September 2009 13:07, Dan Gohman wrote: > MachineMemOperands for spill slots use FixedStack PseudoSourceValues > as their base. There's a unique FixedStack PseudoSourceValue for each > fixed frame object, so it's independent of whether frame pointer > elimination has been done, and it's independent of the actual frame > offsets. >From

On Monday 14 September 2009 15:28, David Greene wrote: > I don't see PseudoSourceValue::FPRel, etc. defined anywhere. How do I know > if a PseudoSourceValue is from the stack? Ok, the comment is misleading. I see the class defined in PseudoSourceValue.cpp now. I'll move it to the header. I have another question. Looking at the list of MachineMemOperands for an instruction, is

...ferent for virtual registers, and stack objects. For virtual registers, we could use the MachineOperand::isDef() and MachineOperand::isUse. For stack objects used for argument-passing (see mem:ST4[Stack] in the example) or return-value (see mem:ST4[FixedStack3]), we could use the MachineMemOperand::IsLoad() and MachineMemOperand::IsStore(). For general stack objects, like the first and second instructions in the example, is there a way for me to identify whether fi#2 is read or written? -- Best regards, Li Qing-An -------------- next part -------------- An HTML attachment was scrubbed... URL: <...

...;t have any examples for testing properties of the MachineMemOperand, so here's one: def mmo_is_load_8 : GIMatchPredicate< (ins instr:$A), (outs), [{ if (!${A}.hasOneMemOperand()) return false; const auto &MMO = *${A}.memoperands_begin(); return MMO.isLoad() && MMO.getSize() == 1; }]>; def : GICombineRule< (defs operand:$D, operand:$A), (match (G_LOAD $D, $A):$MI, (mmo_is_load8 instr:$MI)), (apply ...)>; I've made use of the naming instructions here since this was better in the debug info se...

On Mon, 2005-09-05 at 14:45 +0800, Tzu-Chien Chiu wrote: > why there is no general dependency analysis for the "machin code"? > perhaps it's because the instruction scheduling is only implemented > for sparcv9? Most backends use the SelectionDAG infastructure to do this kind of thing. (Simplifying things a bit) Each basic block is selected to a DAG based IR. Then