search for: islivein

...ce. < void addLiveIn(unsigned Reg) { LiveIns.push_back(Reg); } < 306a303,310 > /// addLiveIn - Add the specified register as a live in. Note that it > /// is an error to add the same register to the same set more than once. > void addLiveIn(unsigned Reg) { > assert(!isLiveIn(Reg)); > LiveIns.push_back(Reg); > } > > ==== //dwarc/Tools/MetaWare/Toolset/main/dev/llvm/lib/CodeGen/BranchFolding.cpp#8 - /remote/arctools/marksl/marksl_1/llvm/lib/CodeGen/BranchFolding.cpp ==== 386c386 < if (RegsLiveAtExit[i]) --- > if (RegsLiveAtExit[i] &amp...

On Sep 18, 2012, at 1:45 PM, Bjorn De Sutter <bjorn.desutter at elis.ugent.be> wrote: > I am working on a backend for a CGRA architecture with advanced predicate support (as on EPIC machines and as first used in the OpenIMPACT compiler). Until last month, the backend was working fine, but since the r161643 commit by stoklund, my backend doesn't work anymore. I think I noticed some

Hi, I am working on a backend for a CGRA architecture with advanced predicate support (as on EPIC machines and as first used in the OpenIMPACT compiler). Until last month, the backend was working fine, but since the r161643 commit by stoklund, my backend doesn't work anymore. I think I noticed some related commits later on, and the assertion I get on the latest trunk (r164162) differs from

On Oct 8, 2013, at 2:06 PM, Akira Hatanaka <ahatanak at gmail.com> wrote: > What I didn't mention in r192119 is that mthi/lo clobbers the other sub-register only if the contents of hi and lo are produced by mult or other arithmetic instructions (div, madd, etc.) It doesn't have this side-effect if it is produced by another mthi/lo. So I don't think making mthi/lo clobber the

...t; + } > +} > + > +void AMDGPU::utilAddLiveIn(MachineFunction * MF, > + MachineRegisterInfo & MRI, > + const TargetInstrInfo * TII, > + unsigned physReg, unsigned virtReg) > +{ > + if (!MRI.isLiveIn(physReg)) { > + MRI.addLiveIn(physReg, virtReg); > + MF->front().addLiveIn(physReg); > + BuildMI(MF->front(), MF->front().begin(), DebugLoc(), > + TII->get(TargetOpcode::COPY), virtReg) > + .addReg(physReg); > + } else { &g...