Displaying 6 results from an estimated 6 matches for "islittle".
2017 Aug 22
2
Subtarget Initialization in <ARCH>TargetMachine constructor
...const TargetOptions &Options,
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool
isLittle)
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle),
TT,
CPU, FS, Options, getEffectiveRelocModel(TT, RM),
getEffectiveCodeModel(CM), OL),
TargetABI(computeTargetABI(TT, CPU, Options)),
TLOF(createTLOF(getTargetTriple...
2017 Aug 23
2
Subtarget Initialization in <ARCH>TargetMachine constructor
...const TargetOptions &Options,
>> Optional<Reloc::Model> RM,
>> Optional<CodeModel::Model> CM,
>> CodeGenOpt::Level OL, bool
>> isLittle)
>> : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle),
>> TT,
>> CPU, FS, Options, getEffectiveRelocModel(TT, RM),
>> getEffectiveCodeModel(CM), OL),
>> TargetABI(computeTargetABI(TT, CPU, Opt...
2013 Apr 01
0
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working
...::string &CPU,
const std::string &FS, bool little,
- Reloc::Model _RM) :
+ Reloc::Model _RM, MipsTargetMachine *_TM) :
MipsGenSubtargetInfo(TT, CPU, FS),
MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little),
IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false),
IsLinux(true), HasSEInReg(false), HasCondMov(false), HasSwap(false),
HasBitCount(false), HasFPIdx(false),
InMips16Mode(false), InMicroMipsMode(false), HasDSP(false), HasDSPR2(false),
- RM(_RM)
+ AllowMi...
2012 Oct 06
2
[LLVMdev] Pairing Registers on a Target Similar to Mips?
....getNode(MIPSISD::ExtractElementF64, dl, MVT::i32,
Arg, DAG.getConstant(0, MVT::i32));
SDValue Hi = DAG.getNode(MIPSISD::ExtractElementF64, dl, MVT::i32,
Arg, DAG.getConstant(1, MVT::i32));
if (!Subtarget->isLittle())
std::swap(Lo, Hi);
unsigned LocRegLo = VA.getLocReg();
unsigned LocRegHigh = getNextIntArgReg(LocRegLo);
RegsToPass.push_back(std::make_pair(LocRegLo, Lo));
RegsToPass.push_back(std::make_pair(LocRegHigh, Hi));
I added this SDValue:
SDVa...
2013 Apr 01
3
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working
On Thu, Mar 28, 2013 at 12:22 PM, Nadav Rotem <nrotem at apple.com> wrote:
> IMHO the right way to handle target function attributes is to
> re-initialize the target machine and TTI for every function (if the
> attributes changed). Do you have another solution in mind ?
I don't really understand this.
TargetMachine and TTI may be quite expensive to initialize. Doing so for
2012 Oct 09
0
[LLVMdev] Pairing Registers on a Target Similar to Mips?
...4, dl,
> MVT::i32,
> Arg, DAG.getConstant(0, MVT::i32));
> SDValue Hi = DAG.getNode(MIPSISD::ExtractElementF64, dl,
> MVT::i32,
> Arg, DAG.getConstant(1, MVT::i32));
>
> if (!Subtarget->isLittle())
> std::swap(Lo, Hi);
>
> unsigned LocRegLo = VA.getLocReg();
> unsigned LocRegHigh = getNextIntArgReg(LocRegLo);
>
> RegsToPass.push_back(std::make_pair(LocRegLo, Lo));
> RegsToPass.push_back(std::make_pair(LocRegHigh, Hi))...