Displaying 3 results from an estimated 3 matches for "islegalandprofitabletofold".
2009 Aug 04
2
[LLVMdev] memory-to-memory instructions
..., %1
store i16 %3, i16* @foo
ret void
}
In the DAG matching code generated from the .td file there is :
if (N1.getOpcode() == ISD::ADD &&
N1.hasOneUse()) {
SDValue N10 = N1.getOperand(0);
if (N10.getOpcode() == ISD::LOAD &&
N10.hasOneUse() &&
IsLegalAndProfitableToFold(N10.getNode(), N1.getNode(), N.getNode()) &&
(Chain.getNode() == N10.getNode() || IsChainCompatible(Chain.getNode(),
N10.getNode()))) {
... NEED TO MATCH ABOVE TO GENERATE MEMORY TO MEMORY PATTERN
}
When debugged we get:
N10.hasOneUse() = 1
IsLegalAndProfitableToFol...
2010 Feb 22
0
[LLVMdev] SelectionDAG legality: isel creating cycles
...we lose folding due to prefetching,
> which is unfortunate.
>
> I am seeing the error with 2.5 (yes, we are upgrading!).
>
> I guess I'll have to backport some of the isLogalToFold logic.
There was x86-only code at pre-2.6 times which was later moved into
generic hook named "isLegalAndProfitableToFold". You might want to
backport just that part.
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University
2010 Feb 22
3
[LLVMdev] SelectionDAG legality: isel creating cycles
On Monday 22 February 2010 13:26:54 David Greene wrote:
> On Monday 22 February 2010 13:06:39 Chris Lattner wrote:
> > > Just wanted to clarify in case someone was wondering about this.
> >
> > I'm currently working in this area. What pattern is causing the cycle?
> > Can I get a testcase?
>
> I'll see if I can generate one and file a PR.
Ah,