search for: isintdivcheap

Displaying 5 results from an estimated 5 matches for "isintdivcheap".

2015 Aug 20
3
[RFC] Improving integer divide optimization (related to D12082)
...makes it harder for a target to >> get the generic code to reach its custom hook? >> Now the "cheap pow2 sdiv” is merged with the generic “cheap div” you can’t >> distinguish anymore. >> > > Yes and also the issue of needing more information to make a smart > isIntDivCheap() decision. > > In visitSDIV(), checking looks like this when the denominator is a power of 2. > > if (TLI.isIntDivCheap(N->getValueType(0), MinSize)) > return SDValue(); > > // Target-specific implementation of sdiv x, pow2. > if (SDValue Res = BuildSDIV...
2015 Aug 20
2
[RFC] Improving integer divide optimization (related to D12082)
> On Aug 19, 2015, at 3:48 PM, escha via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > >> On Aug 19, 2015, at 1:45 PM, Steve King via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >> >> In the targets I know, shifts are >> cheaper than divides in both speed and size. > > From what I remember, udiv by
2015 Aug 20
2
[RFC] Improving integer divide optimization (related to D12082)
...generic code to reach its custom hook? >>>> Now the "cheap pow2 sdiv” is merged with the generic “cheap div” you can’t >>>> distinguish anymore. >>>> >>> >>> Yes and also the issue of needing more information to make a smart >>> isIntDivCheap() decision. >>> >>> In visitSDIV(), checking looks like this when the denominator is a power of 2. >>> >>> if (TLI.isIntDivCheap(N->getValueType(0), MinSize)) >>> return SDValue(); >>> >>> // Target-specific implementation...
2015 Aug 19
3
[RFC] Improving integer divide optimization (related to D12082)
Hello LLVM, A recent commit creates the isIntDivCheap() target query. http://reviews.llvm.org/D12082 The current approach has a couple shortcomings. First, when targets decide divide is cheap, the DAGCombiner ignores obvious power-of-2 optimizations. In the targets I know, shifts are cheaper than divides in both speed and size. The target cannot...
2020 Mar 27
2
Instruction selection phase
Hello LLVM-Dev, Attached are: · The DAG after being built · The DAG before the legalization phase The DAG illustrated performs a signed division for type i32. As can be seen, the SDIV node was converted to a series of other nodes (which includes a MULHS node). In the target lowering class of our target, the SDIV has an operation action of custom. Does anybody know where in