search for: isimplicit

...th a subregindex, an implicit-use operand was added with this code: VirtUseOps.insert(VirtUseOps.begin(), MI.getNumOperands()); MI.addOperand(MachineOperand::CreateReg(VirtReg, false, // isDef true)); // isImplicit As, can be seen, it is presumed that this operand is always the last operand, this is however not the case. It in fact becomes the first of the impl-use operands. It might be preferred to change the addOperand(), so as to always insert the operand as the last element, or one could handle this loc...

Dear Tim, Thank you for your thorough reply. So, based on your reply I get every operand and check them to be (isDef && !isimplicit). Now my problem is that it gives me the physical register number.i.e, for example, instead of r0, it return %physreg66. Could you please help me on how to convert these physical register number to the ARM related register? I mean the 15 GPRs in ARM. Thank you, Fami On Sat, Dec 19, 2015 at 5:02 PM...

Hello everyone, I am trying to write a code to do the following: 1. Get an ARM machine instruction 2. Find destination register of that instruction that has been written 3. set a bit in a vector, according to that register number. (Since it's ARM, I have a 15 bit vector) It means if I have : add r0, r1, r0 I want to get r0 as dest reg and set the index 0 of my vector to 1. I get my machine

...instruction, and LDriuh_cdnNotPt is a _conditional_ load, which might or might not Take place based on the outcome of the compare... As such R0 might or might not be defined in this bundle, which obviously changes the liveness update process. My question, do we need another attribute along with isImplicit and isEarlyClobber etc. to designate a conditional def? Furthermore, depending on architectural details we well might have a conditional use as well... and what about the individual (unbundled) def/use? Should this: %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>, %R16, 0; ...become thi...

..._cdnNotPt is a _conditional_ load, which might or might not > Take place based on the outcome of the compare... As such R0 might or might > not be defined in this bundle, which obviously changes the liveness update > process. > > My question, do we need another attribute along with isImplicit and > isEarlyClobber etc. to designate a conditional def? Furthermore, depending > on architectural details we well might have a conditional use as well... and > what about the individual (unbundled) def/use? Should this: > > %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>...

...icit-use operand was added with this code: > > VirtUseOps.insert(VirtUseOps.begin(), MI.getNumOperands()); > MI.addOperand(MachineOperand::CreateReg(VirtReg, > false, // isDef > true)); // isImplicit > > As, can be seen, it is presumed that this operand is always the last operand, this is however not the case. It in fact becomes the first of the impl-use operands. > > It might be preferred to change the addOperand(), so as to always insert the operand as the last element, or one c...

...which might or might not > Take > > place based on the outcome of the compare... As such R0 might or > might > > not be defined in this bundle, which obviously changes the liveness > > update process. > > > > My question, do we need another attribute along with isImplicit and > > isEarlyClobber etc. to designate a conditional def? Furthermore, > > depending on architectural details we well might have a conditional > > use as well... and what about the individual (unbundled) def/use? > Should this: > > > > %R0<def> = LDriuh_cdnN...

...cdnNotPt is a _conditional_ load, which might or might not > Take place based on the outcome of the compare... As such R0 might or might > not be defined in this bundle, which obviously changes the liveness update > process. > > My question, do we need another attribute along with isImplicit and > isEarlyClobber etc. to designate a conditional def? Furthermore, depending > on architectural details we well might have a conditional use as well... and > what about the individual (unbundled) def/use? Should this: > > %R0<def> = LDriuh_cdnNotPt %P0<kill,internal>,...

Dave, Thank you for your interest. Please see my replies below. Sorry that my terminology is not as crisp as Andy's, but I think you can see what I mean. Sergei -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. > -----Original Message----- > From: dag at cray.com [mailto:dag at cray.com] > Sent: Friday, May 11, 2012 12:14 PM > To: Sergei Larin > Cc:

...th a subregindex, an implicit-use operand was added with this code: VirtUseOps.insert(VirtUseOps.begin(), MI.getNumOperands()); MI.addOperand(MachineOperand::CreateReg(VirtReg, false, // isDef true)); // isImplicit As, can be seen, it is presumed that this operand is always the last operand, this is however not the case. It in fact becomes the first of the impl-use operands. It might be preferred to change the addOperand(), so as to always insert the operand as the last element, or one could handle this loc...

> From: aprantl at apple.com <aprantl at apple.com> > Since it sounds like the problem is only with implicit descriptions, would a rule > such as "if the expression has a DW_OP_stack_value, add an extra > DW_OP_deref" work for the PrologueEpilgueInserter or do we need > something more principled? Right, that could very well be sufficient for this particular case so

...hich might or might not > Take > > place based on the outcome of the compare... As such R0 might or > might > > not be defined in this bundle, which obviously changes the liveness > > update process. > > > > My question, do we need another attribute along with isImplicit > and > > isEarlyClobber etc. to designate a conditional def? Furthermore, > > depending on architectural details we well might have a conditional > > use as well... and what about the individual (unbundled) def/use? > Should this: > > > > %R0<def> = LDriuh...

...ot >> Take >>> place based on the outcome of the compare... As such R0 might or >> might >>> not be defined in this bundle, which obviously changes the liveness >>> update process. >>> >>> My question, do we need another attribute along with isImplicit and >>> isEarlyClobber etc. to designate a conditional def? Furthermore, >>> depending on architectural details we well might have a conditional >>> use as well... and what about the individual (unbundled) def/use? >> Should this: >>> >>> %R0<d...

Hi Tom, Thanks a lot for your explanations, now it makes a lot more sense ;) I had a slightly closer look at the R600 packetizer, and the issue is that the third LSHL instruction has both an implicit use and *afterwards* an implicit def of T1_XYZW. The latter def causes the current ScheduleDAGInstrs implementation to ignore the implicit use, thus the ScheduleDAG only contains an

...;> MI->dump(); >> - assert(0&& "unknown operand type"); >> + llvm_unreachable("unknown operand type"); >> case MachineOperand::MO_Register: >> // Ignore all implicit register operands. >> if (MO.isImplicit()) continue; >> diff --git a/lib/Target/Hexagon/HexagonSchedule.td b/lib/Target/Hexagon/HexagonSchedule.td >> index fbea445..c488796 100644 >> --- a/lib/Target/Hexagon/HexagonSchedule.td >> +++ b/lib/Target/Hexagon/HexagonSchedule.td >> @@ -13,7 +13,6 @@ def LSUNIT...