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isimleri
2012 Jan 18
2
[LLVMdev] Question about isel patterns
.... the imm operand 0xffff is
sign-extended to 64-bit when added.
Currently, I have the following patterns (the last instruction of the
sequence, or the root of the DAG, can be ADDiu, ORi, SLL or LUi):
def : Pat<(isImmADDiu:$imm), (ADDiu (RegOpnd imm:$imm), (ImmOpnd imm:$imm))>;
def : Pat<(isImmORi:$imm), (ORi (RegOpnd imm:$imm), (ImmOpnd imm:$imm))>;
def : Pat<(isImmSLL:$imm), (SLL (RegOpnd imm:$imm), (ImmOpnd imm:$imm))>;
def : Pat<(isImmLUi:$imm), (LUi (ImmOpnd imm:$imm))>;
isImm*, RegOpnd and ImmOpnd all call a function which computes the
instruction sequence (the result i...