Displaying 5 results from an estimated 5 matches for "isfullcopi".
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isfullcopy
2012 Jul 06
2
[LLVMdev] MachineOperand: Subreg defines and the Undef flag
On Jul 5, 2012, at 6:01 PM, "Pranav Bhandarkar" <pranavb at codeaurora.org> wrote:
> Hi Jakob,
>
>> New_MI_1:: Vreg1 = 0 ; Vreg1 and Vreg2
>> are 32 bit virt. regs.
>> New_MI_2:: Vreg2 = COPY C:lo_sub_reg.
>> New_MI_3:: B= REG_SEQUENCE<Vreg1, hi_sub_reg, Vreg2, lo_sub_reg> ; B
>> is a
>> 64 bit
2012 Jul 06
0
[LLVMdev] MachineOperand: Subreg defines and the Undef flag
>
>
> That sounds like a bug, probably adjustCopiesBackFrom needs to check
> ACopyMI->isFullCopy().
>
> Do you have a test case for this?
>
>
Yes and No. Yes because the example is from a unit testcase that I have. No
because it manifests itself only with my half baked pass that I was talking
about earlier in this thread.
Pranav
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2012 Jul 06
1
[LLVMdev] MachineOperand: Subreg defines and the Undef flag
On Jul 6, 2012, at 7:30 AM, Pranav D Bhandarkar <pranav.bhandarkar at utexas.edu> wrote:
> That sounds like a bug, probably adjustCopiesBackFrom needs to check ACopyMI->isFullCopy().
>
> Do you have a test case for this?
>
>
> Yes and No. Yes because the example is from a unit testcase that I have. No because it manifests itself only with my half baked pass that I
2012 Jul 06
0
[LLVMdev] MachineOperand: Subreg defines and the Undef flag
Hi Jakob,
> New_MI_1:: Vreg1 = 0 ; Vreg1 and Vreg2
> are 32 bit virt. regs.
> New_MI_2:: Vreg2 = COPY C:lo_sub_reg.
> New_MI_3:: B= REG_SEQUENCE<Vreg1, hi_sub_reg, Vreg2, lo_sub_reg> ; B
> is a
> 64 bit virt reg.
I used this approach and it worked find until I hit, what I believe is, a
bug in the register coalescer.
When the register
2012 Jul 05
3
[LLVMdev] MachineOperand: Subreg defines and the Undef flag
Hi Jakob,
Thanks for your reply.
>
> The <undef> flag goes on NewMI_1 because the virtual register B isn't live
> before that instruction.
>
> But you probably shouldn't be doing this yourself. Your NewMI code isn't
in
> SSA form because B has multiple definitions. Just use a REG_SEQUENCE
> instruction, and let the register allocator do the transformation