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...ar.de> wrote: > Hi! > > I added 2 more tests and also refined an assert statement. Applies cleanly > to r148473 now. Are there more comments on the code? Thank you!! + assert(Inst.getOperand(0).isReg() && + (Inst.getOperand(ImmOp).isImm() || + (Inst.getOperand(ImmOp).isExpr() && + Inst.getOperand(ImmOp).getExpr()->getKind() == MCExpr::SymbolRef) && + static_cast<const MCSymbolRefExpr*>(Inst.getOperand(ImmOp).getExpr())->getKind() == MCSymbolRefExpr::VK_SECREL) && Just asserting "Inst.getOperand(ImmOp).isImm() || (Inst.ge...

Hi! I added 2 more tests and also refined an assert statement. Applies cleanly to r148473 now. Are there more comments on the code? Thank you!! Regards Kai On 01.01.2012 22:01, Eli Friedman wrote: > On Sun, Jan 1, 2012 at 10:44 AM, Kai<kai at redstar.de> wrote: >> Happy new year to all! >> >> The attached patch adds TLS support for x86_64-pc-win32 and x86-pc-win32.

...(const MCInst *MI, unsigned OpNo, raw_ostream &O) { const MCOperand &Op = MI->getOperand(OpNo); if (Op.isReg()) { O << '%' << getRegisterName(Op.getReg()); } else if (Op.isImm()) { ... } else { assert(Op.isExpr() && "unknown operand kind in printOperand"); // HERE I remove the '$' to make it work O << '$' << *Op.getExpr(); } I hope someone is good in this thing! Thank you for your help, Patrick Marlier.

On 06/21/2010 08:21 PM, Eric Christopher wrote: > On Jun 21, 2010, at 2:56 AM, Patrick Marlier wrote: > > >> Hello, >> >> This bug affects all LLVM versions from 2.6 to trunk : >> http://llvm.org/bugs/show_bug.cgi?id=5081 >> >> The workaround I found is to add this : >> >> Index: lib/Target/X86/X86Instr64bit.td >>

...getMipsRegisterNumbering(Reg); return RegNo; } else if (MO.isImm()) { return static_cast<unsigned>(MO.getImm()); } else if (MO.isFPImm()) { return static_cast<unsigned>(APFloat(MO.getFPImm()) .bitcastToAPInt().getHiBits(32).getLimitedValue()); } else if (MO.isExpr()) { const MCExpr *p_expr = MO.getExpr(); Fixups.push_back(MCFixup::Create(0, p_expr, MCFixupKind(Mips::fixup_Mips_Branch_PCRel))); } return 0; } ############################################ Later in MipsAsmBackend.cpp:ApplyFixup() I find the value is the offset of the target valu...

On Fri, 2015-02-20 at 13:47 -0500, Rafael Espíndola wrote: > > Your task, should you choose to accept it, is to make it cope with other > > forms of relaxation where necessary. > > And if not, please open a bug :-) http://llvm.org/bugs/show_bug.cgi?id=22662 FWIW I could reproduce the 'movl foo, %ebx' one but a relative jump *was* using 16 bits (although gas uses 8):

...ned OpNo, > raw_ostream &O) { > const MCOperand &Op = MI->getOperand(OpNo); > if (Op.isReg()) { > O << '%' << getRegisterName(Op.getReg()); > } else if (Op.isImm()) { > ... > } else { > assert(Op.isExpr() && "unknown operand kind in printOperand"); > // HERE I remove the '$' to make it work > O << '$' << *Op.getExpr(); > } > Hrm. Something is wonky here. Can you file a testcase with a .i file I can compile please? -eric

...o, raw_ostream &O) { const MCOperand &Op = MI->getOperand(OpNo); ZZ if (Op.isImm()) { int64_t Imm = Op.getImm() + 2; <<<======================== O << "$"; if (Imm >= 0) O << '+'; O << Imm; } else { assert(Op.isExpr() && "unknown pcrel immediate operand"); Op.getExpr()->print(O, &MAI); } } Which works well enough except for the constant 2 that I've arrowed - it needs to be the length of the binary instruction in bytes. The MC6809 has a *LOT* of variability here, so a case st...

...raw_ostream&O) { >> const MCOperand&Op = MI->getOperand(OpNo); >> if (Op.isReg()) { >> O<< '%'<< getRegisterName(Op.getReg()); >> } else if (Op.isImm()) { >> ... >> } else { >> assert(Op.isExpr()&& "unknown operand kind in printOperand"); >> // HERE I remove the '$' to make it work >> O<< '$'<< *Op.getExpr(); >> } >> > > Hrm. Something is wonky here. Can you file a testcase with a .i file I can compile...

...t; return RegNo; > > } else if (MO.isImm()) { > return static_cast<unsigned>(MO.getImm()); > } else if (MO.isFPImm()) { > return static_cast<unsigned>(APFloat(MO.getFPImm()) > .bitcastToAPInt().getHiBits(32).getLimitedValue()); > } else if (MO.isExpr()) { > const MCExpr *p_expr = MO.getExpr(); > Fixups.push_back(MCFixup::Create(0, p_expr, > MCFixupKind(Mips::fixup_Mips_Branch_PCRel))); > } > return 0; > } > > ############################################ > > Later in MipsAsmBackend.cpp:ApplyFixup() I f...

...FileNo << ", Filename = '" << Filename << "'"); > } > > void WinCOFFStreamer::EmitInstruction(const MCInst &Instruction) { > + for (unsigned i = 0, e = Instruction.getNumOperands(); i != e; ++i) > + if (Instruction.getOperand(i).isExpr()) > + VisitSymbols(Instruction.getOperand(i).getExpr()); > + > + getSectionData()->setHasInstructions(true); > + > + // FIXME: Who owns this memory? > + MCInstFragment *Fragment = > + new MCInstFragment(Instruction, getSectionData()); > + > + { > + r...

On Sun, Jul 11, 2010 at 6:10 PM, Chris Lattner <clattner at apple.com> wrote: > This probably needs to be slightly tweaked to work with mainline.  I don't see anything objectionable, but I think Daniel needs to review this one. Updated patch to work with mainline. http://github.com/Bigcheese/llvm-mirror/commit/d19a4c82c18afc4830c09b70f02d162292231c94 - Michael Spencer

...nstPrinter::printFrameIndexOperand >> >> void HexagonInstPrinter::printGlobalOperand(const MCInst *MI, unsigned OpNo, >> raw_ostream&O) const { >> - const MCOperand& MO = MI->getOperand(OpNo); >> - assert(MO.isExpr()&& "Expecting expression"); >> + assert(MI->getOperand(OpNo).isExpr()&& "Expecting expression"); >> >> printOperand(MI, OpNo, O); >> } >> >> void HexagonInstPrinter::printJumpTable(const MCInst *MI, unsigned OpNo...