search for: iseligiblefortailcallelimin

Displaying 12 results from an estimated 12 matches for "iseligiblefortailcallelimin".

2007 Sep 24
2
[LLVMdev] RFC: Tail call optimization X86
...Signed, > bool isVarArg, unsigned CallingConv, bool isTailCall, > - SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); > + bool isNextInstRet, SDOperand Callee, ArgListTy &Args, > + SelectionDAG &DAG); > + // IsEligibleForTailCallElimination - Check whether the call is > eligible for > + // tailcall elimination > + virtual bool IsEligibleForTailCallElimination(SelectionDAG& DAG, > + bool IsNextInstRet, > + SDOperand C...
2007 Sep 24
0
[LLVMdev] RFC: Tail call optimization X86
...bool isVarArg, unsigned CallingConv, bool isTailCall, >> - SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); >> + bool isNextInstRet, SDOperand Callee, ArgListTy &Args, >> + SelectionDAG &DAG); >> + // IsEligibleForTailCallElimination - Check whether the call is >> eligible for >> + // tailcall elimination >> + virtual bool IsEligibleForTailCallElimination(SelectionDAG& DAG, >> + bool IsNextInstRet, >> +...
2007 Sep 24
0
[LLVMdev] RFC: Tail call optimization X86
...Type *RetTy, bool RetTyIsSigned, bool isVarArg, unsigned CallingConv, bool isTailCall, - SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); + bool isNextInstRet, SDOperand Callee, ArgListTy &Args, + SelectionDAG &DAG); + // IsEligibleForTailCallElimination - Check whether the call is eligible for + // tailcall elimination + virtual bool IsEligibleForTailCallElimination(SelectionDAG& DAG, + bool IsNextInstRet, + SDOperand Callee, +...
2007 Sep 23
2
[LLVMdev] RFC: Tail call optimization X86
The patch is against revision 42247. -------------- next part -------------- A non-text attachment was scrubbed... Name: tailcall-src.patch Type: application/octet-stream Size: 62639 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20070923/4770302f/attachment.obj>
2007 Sep 25
2
[LLVMdev] RFC: Tail call optimization X86
...VarArg, unsigned CallingConv, bool isTailCall, > >> - SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); > >> + bool isNextInstRet, SDOperand Callee, ArgListTy &Args, > >> + SelectionDAG &DAG); > >> + // IsEligibleForTailCallElimination - Check whether the call is > >> eligible for > >> + // tailcall elimination > >> + virtual bool IsEligibleForTailCallElimination(SelectionDAG& DAG, > >> + bool IsNextInstRet, > >> +...
2007 Sep 25
0
[LLVMdev] RFC: Tail call optimization X86
...;>>> - SDOperand Callee, ArgListTy &Args, SelectionDAG >>>> &DAG); >>>> + bool isNextInstRet, SDOperand Callee, ArgListTy >>>> &Args, >>>> + SelectionDAG &DAG); >>>> + // IsEligibleForTailCallElimination - Check whether the call is >>>> eligible for >>>> + // tailcall elimination >>>> + virtual bool IsEligibleForTailCallElimination(SelectionDAG& DAG, >>>> + bool >>>> IsNextInstRet...
2007 Sep 11
0
[LLVMdev] RFC: Tail call optimization X86
...s no need to change indentation for the rest of the function. 9. +// Check to see whether the next instruction following the call is a return +// A function is eligable if caller/callee calling conventions match and the +// function CALL is immediatly followed by a RET +bool X86TargetLowering::IsEligibleForTailCallElimination(SDOperand Call, SelectionDAG& DAG, unsigned CalleeCC, SDOperand Callee) { + bool IsEligible = false; + SDNode * CallNode = Call.Val; ... +SDOperand X86TargetLowering::LowerX86_32FastCCCallTo(SDOperand Op, + SelectionDAG &DAG, +...
2007 Sep 06
2
[LLVMdev] RFC: Tail call optimization X86
Hi Evan, first off thanks to you and Chris for taking time. On 6 Sep 2007, at 00:57, Evan Cheng wrote: > We'd like to see tail call optimization to be similar to the target > independent lowering of ISD::CALL nodes. These are auto-generated > from ???CallingConv.td files. Some target specific details such as > function address register (ECX in your example) should be coded in
2007 Sep 11
2
[LLVMdev] RFC: Tail call optimization X86
...est of the function. > Okay > 9. > +// Check to see whether the next instruction following the call is a > return > +// A function is eligable if caller/callee calling conventions match > and the > +// function CALL is immediatly followed by a RET > +bool X86TargetLowering::IsEligibleForTailCallElimination(SDOperand > Call, SelectionDAG& DAG, unsigned CalleeCC, SDOperand Callee) { > + bool IsEligible = false; > + SDNode * CallNode = Call.Val; > ... > > +SDOperand X86TargetLowering::LowerX86_32FastCCCallTo(SDOperand Op, > +...
2007 Oct 02
0
[LLVMdev] RFC: Tail call optimization X86
Hi all, I changed the code that checks whether a tail call is really eligible for optimization so that it performs the check/fix in SelectionDAGISel.cpp:BuildSelectionDAG() as suggest by Evan. Also eliminated an error that caused the remaining failing test cases in the test-suite. The results look very nice (on darwin x86, r42486). The same number (46) of failing test cases on patched
2007 Sep 26
3
[LLVMdev] RFC: Tail call optimization X86
On Tue, 25 Sep 2007, Evan Cheng wrote: >> the stack adjustment only fastcc was not one of them. Now that fastcc >> can cause tail call optimization i had to change the convention from >> caller pops arguments to callee pops arguments in order to allow tail >> call optimization in a general way. > > Hmmm. Ok. So this is due to X86CallingConv.td changes? Unfortunately
2007 Oct 04
3
[LLVMdev] RFC: Tail call optimization X86
...onv.td file has: > > class CCIfSubtarget<string F, CCAction A> > : CCIf<! strconcat("State.getTarget().getSubtarget<X86Subtarget>().", F), A>; > > It would be straight-forward to have a CCIf defined to check some command > line argument. +/// IsEligibleForTailCallElimination - Check to see whether the next instruction +// following the call is a return. A function is eligible if caller/ callee +// calling conventions match, currently only fastcc supports tail calls, and the +// function CALL is immediatly followed by a RET +bool X86TargetLowering::IsEligibleF...