Displaying 7 results from an estimated 7 matches for "iseligible".
2007 Sep 24
0
[LLVMdev] RFC: Tail call optimization X86
...Type *RetTy, bool RetTyIsSigned,
bool isVarArg, unsigned CallingConv, bool isTailCall,
- SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG);
+ bool isNextInstRet, SDOperand Callee, ArgListTy &Args,
+ SelectionDAG &DAG);
+ // IsEligibleForTailCallElimination - Check whether the call is
eligible for
+ // tailcall elimination
+ virtual bool IsEligibleForTailCallElimination(SelectionDAG& DAG,
+ bool IsNextInstRet,
+ SDOperand Callee,...
2007 Sep 23
2
[LLVMdev] RFC: Tail call optimization X86
The patch is against revision 42247.
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2007 Sep 11
0
[LLVMdev] RFC: Tail call optimization X86
...s no need to change indentation for the rest of the function.
9.
+// Check to see whether the next instruction following the call is a
return
+// A function is eligable if caller/callee calling conventions match
and the
+// function CALL is immediatly followed by a RET
+bool X86TargetLowering::IsEligibleForTailCallElimination(SDOperand
Call, SelectionDAG& DAG, unsigned CalleeCC, SDOperand Callee) {
+ bool IsEligible = false;
+ SDNode * CallNode = Call.Val;
...
+SDOperand X86TargetLowering::LowerX86_32FastCCCallTo(SDOperand Op,
+ Selection...
2007 Sep 06
2
[LLVMdev] RFC: Tail call optimization X86
Hi Evan,
first off thanks to you and Chris for taking time.
On 6 Sep 2007, at 00:57, Evan Cheng wrote:
> We'd like to see tail call optimization to be similar to the target
> independent lowering of ISD::CALL nodes. These are auto-generated
> from ???CallingConv.td files. Some target specific details such as
> function address register (ECX in your example) should be coded in
2007 Sep 24
2
[LLVMdev] RFC: Tail call optimization X86
...Signed,
> bool isVarArg, unsigned CallingConv, bool isTailCall,
> - SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG);
> + bool isNextInstRet, SDOperand Callee, ArgListTy &Args,
> + SelectionDAG &DAG);
> + // IsEligibleForTailCallElimination - Check whether the call is
> eligible for
> + // tailcall elimination
> + virtual bool IsEligibleForTailCallElimination(SelectionDAG& DAG,
> + bool IsNextInstRet,
> +...
2007 Sep 11
2
[LLVMdev] RFC: Tail call optimization X86
...est of the function.
>
Okay
> 9.
> +// Check to see whether the next instruction following the call is a
> return
> +// A function is eligable if caller/callee calling conventions match
> and the
> +// function CALL is immediatly followed by a RET
> +bool X86TargetLowering::IsEligibleForTailCallElimination(SDOperand
> Call, SelectionDAG& DAG, unsigned CalleeCC, SDOperand Callee) {
> + bool IsEligible = false;
> + SDNode * CallNode = Call.Val;
> ...
>
> +SDOperand X86TargetLowering::LowerX86_32FastCCCallTo(SDOperand Op,
> +...
2007 Sep 24
0
[LLVMdev] RFC: Tail call optimization X86
...bool isVarArg, unsigned CallingConv, bool isTailCall,
>> - SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG);
>> + bool isNextInstRet, SDOperand Callee, ArgListTy &Args,
>> + SelectionDAG &DAG);
>> + // IsEligibleForTailCallElimination - Check whether the call is
>> eligible for
>> + // tailcall elimination
>> + virtual bool IsEligibleForTailCallElimination(SelectionDAG& DAG,
>> + bool IsNextInstRet,
>> +...