search for: isdot

Hi, In the PPC backend, there is a "helper" class used to define instructions that implicitly define a condition register: class isDOT { list<Register> Defs = [CR0]; bit RC = 1; } and this gets used on instructions such as: def ADDICo : DForm_2<13, (outs GPRC:$rD), (ins GPRC:$rA, s16imm:$imm), "addic. $rD, $rA, $imm", IntGeneral, []>, isDOT; but there is a s...

On Apr 12, 2013, at 2:06 AM, Hal Finkel <hfinkel at anl.gov> wrote: > In the PPC backend, there is a "helper" class used to define instructions that implicitly define a condition register: > > class isDOT { > list<Register> Defs = [CR0]; > bit RC = 1; > } > > and this gets used on instructions such as: > > def ADDICo : DForm_2<13, (outs GPRC:$rD), (ins GPRC:$rA, s16imm:$imm), > "addic. $rD, $rA, $imm", IntGeneral, >...

...dev] TableGen list merging > > > On Apr 12, 2013, at 2:06 AM, Hal Finkel <hfinkel at anl.gov> wrote: > > > In the PPC backend, there is a "helper" class used to define > > instructions that implicitly define a condition register: > > > > class isDOT { > > list<Register> Defs = [CR0]; > > bit RC = 1; > > } > > > > and this gets used on instructions such as: > > > > def ADDICo : DForm_2<13, (outs GPRC:$rD), (ins GPRC:$rA, > > s16imm:$imm), > > "addic....

...base_r3xo_swapped 316 <bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 317 InstrItinClass itin> 318 : I<opcode, OOL, IOL, asmstr, itin> { 319 bits<5> A; 320 bits<5> RST; 321 bits<5> B; 322 323 bit RC = 0; // set by isDOT 324 325 let Inst{6-10} = RST; 326 let Inst{11-15} = A; 327 let Inst{16-20} = B; 328 let Inst{21-30} = xo; 329 let Inst{31} = RC; 330 } 337 class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 338 InstrItinClass itin, list<dag&gt...

My systems: rh61, 2.2.14 + smbfs-nls.patch. I refer to 2.0.7pre3 as 2.0.7 === 1) "ls" of an empty dir 1a) 1.9.18 doing "ls" to an empty samba dir: smb: \> ls 49550 blocks of size 16384. 33754 blocks available 1b) 2.0.7 doing "ls" to an empty samba dir: smb: \> ls ERRDOS - ERRbadfile (File not found.) listing \* <=======

...dag OOL, dag IOL, string > asmstr, > > 317 InstrItinClass itin> > > 318 : I<opcode, OOL, IOL, asmstr, itin> { > > 319 bits<5> A; > > 320 bits<5> RST; > > 321 bits<5> B; > > 322 > > 323 bit RC = 0; // set by isDOT > > > > 324 > > 325 let Inst{6-10} = RST; > > 326 let Inst{11-15} = A; > > 327 let Inst{16-20} = B; > > 328 let Inst{21-30} = xo; > > 329 let Inst{31} = RC; > > 330 } > > > > 337 class XForm_6<bits<6> opcode, bits&lt...

...its<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, > 317 InstrItinClass itin> > 318 : I<opcode, OOL, IOL, asmstr, itin> { > 319 bits<5> A; > 320 bits<5> RST; > 321 bits<5> B; > 322 > 323 bit RC = 0; // set by isDOT > > 324 > 325 let Inst{6-10} = RST; > 326 let Inst{11-15} = A; > 327 let Inst{16-20} = B; > 328 let Inst{21-30} = xo; > 329 let Inst{31} = RC; > 330 } > > 337 class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string > asmstr...

...; asmstr, >> > 317 InstrItinClass itin> >> > 318 : I<opcode, OOL, IOL, asmstr, itin> { >> > 319 bits<5> A; >> > 320 bits<5> RST; >> > 321 bits<5> B; >> > 322 >> > 323 bit RC = 0; // set by isDOT >> > >> > 324 >> > 325 let Inst{6-10} = RST; >> > 326 let Inst{11-15} = A; >> > 327 let Inst{16-20} = B; >> > 328 let Inst{21-30} = xo; >> > 329 let Inst{31} = RC; >> > 330 } >> > >> > 337 class...

...xo, dag OOL, dag IOL, string asmstr, > > 317 InstrItinClass itin> > > 318 : I<opcode, OOL, IOL, asmstr, itin> { > > 319 bits<5> A; > > 320 bits<5> RST; > > 321 bits<5> B; > > 322 > > 323 bit RC = 0; // set by isDOT > > > > 324 > > 325 let Inst{6-10} = RST; > > 326 let Inst{11-15} = A; > > 327 let Inst{16-20} = B; > > 328 let Inst{21-30} = xo; > > 329 let Inst{31} = RC; > > 330 } > > > > 337 class XForm_6<bits<6> opcode, bits&lt...

...InstrItinClass itin> > >> > 318 : I<opcode, OOL, IOL, asmstr, itin> { > >> > 319 bits<5> A; > >> > 320 bits<5> RST; > >> > 321 bits<5> B; > >> > 322 > >> > 323 bit RC = 0; // set by isDOT > >> > > >> > 324 > >> > 325 let Inst{6-10} = RST; > >> > 326 let Inst{11-15} = A; > >> > 327 let Inst{16-20} = B; > >> > 328 let Inst{21-30} = xo; > >> > 329 let Inst{31} = RC; > >> > 330...

...n NT_STATUS_INVALID_LEVEL; + } + + nfname = talloc_strdup(mem_ctx, smb_fname->base_name); + if (nfname == NULL) { + return NT_STATUS_NO_MEMORY; + } + + if (ISDOT(nfname)) { + nfname[0] = '\0'; + } + string_replace(nfname, '/', '\\'); + + if (smb_fname->stream_name != NULL) { + const char *s = smb_fname->...

...[(PPCcmp_unres G8RC:$rA, immSExt16:$imm, imm:$label)]>; -} +let Defs = [CR0] in +def STDCX : XForm_1<31, 214, (outs), (ins G8RC:$rS, memrr:$dst), + "stdcx. $rS, $dst", LdStSTDCX, + [(PPCstcx G8RC:$rS, xoaddr:$dst)]>, + isDOT; let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in def TCRETURNdi8 :Pseudo< (outs), Index: lib/Target/PowerPC/PPCInstrInfo.td =================================================================== --- lib/Target/PowerPC/PPCInstrInfo.td (revision 52957) +++ lib/Target/PowerPC/PPCI...

PPCTargetLowering::EmitInstrWithCustomInserter has a reference to the current MachineFunction for other purposes. Can you use MachineFunction::getRegInfo instead? Dan On Jul 8, 2008, at 1:56 PM, Gary Benson wrote: > Would it be acceptable to change MachineInstr::getRegInfo from private > to public so I can use it from > PPCTargetLowering::EmitInstrWithCustomInserter? > >

...[(PPCcmp_unres G8RC:$rA, immSExt16:$imm, imm:$label)]>; -} +let Defs = [CR0] in +def STDCX : XForm_1<31, 214, (outs), (ins G8RC:$rS, memrr:$dst), + "stdcx. $rS, $dst", LdStSTDCX, + [(PPCstcx G8RC:$rS, xoaddr:$dst)]>, + isDOT; let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in def TCRETURNdi8 :Pseudo< (outs), Index: lib/Target/PowerPC/PPCInstrInfo.td =================================================================== --- lib/Target/PowerPC/PPCInstrInfo.td (revision 53464) +++ lib/Target/PowerPC/PPCI...

Hi Gary, This does not patch cleanly for me (PPCISelLowering.cpp). Can you prepare a updated patch? Thanks, Evan On Jul 10, 2008, at 11:45 AM, Gary Benson wrote: > Cool, that worked. New patch attached... > > Cheers, > Gary > > Evan Cheng wrote: >> Just cast both values to const TargetRegisterClass*. >> >> Evan >> >> On Jul 10, 2008, at 7:36

Just cast both values to const TargetRegisterClass*. Evan On Jul 10, 2008, at 7:36 AM, Gary Benson wrote: > Evan Cheng wrote: >> How about? >> >> const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : >> &PPC:G8RCRegClass; >> unsigned TmpReg = RegInfo.createVirtualRegister(RC); > > I tried something like that yesterday: > > const

Evan Cheng wrote: > How about? > > const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : > &PPC:G8RCRegClass; > unsigned TmpReg = RegInfo.createVirtualRegister(RC); I tried something like that yesterday: const TargetRegisterClass *RC = is64bit ? &PPC::GPRCRegClass : &PPC::G8RCRegClass; but I kept getting this error no matter how I arranged it:

You need to insert new basic blocks and update CFG to accomplish this. There is a hackish way to do this right now. Add a pseudo instruction to represent this operation and mark it usesCustomDAGSchedInserter. This means the intrinsic is mapped to a single (pseudo) node. But it is then expanded into instructions that can span multiple basic blocks. See

...[(PPCcmp_unres G8RC:$rA, immSExt16:$imm, imm:$label)]>; -} +let Defs = [CR0] in +def STDCX : XForm_1<31, 214, (outs), (ins G8RC:$rS, memrr:$dst), + "stdcx. $rS, $dst", LdStSTDCX, + [(PPCstcx G8RC:$rS, xoaddr:$dst)]>, + isDOT; let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in def TCRETURNdi8 :Pseudo< (outs), Index: lib/Target/PowerPC/PPCInstrInfo.td =================================================================== --- lib/Target/PowerPC/PPCInstrInfo.td (revision 52957) +++ lib/Target/PowerPC/PPCI...

Would it be acceptable to change MachineInstr::getRegInfo from private to public so I can use it from PPCTargetLowering::EmitInstrWithCustomInserter? Cheers, Gary Evan Cheng wrote: > Look for createVirtualRegister. These are examples in > PPCISelLowering.cpp. > > Evan > On Jul 8, 2008, at 8:24 AM, Gary Benson wrote: > > > Hi Evan, > > > > Evan Cheng wrote: