search for: isdarwin

Hi everyone, I have almost completed the implementation of a linux/ppc backend in llvm. There were a few things to modify in lib/Target/PowerPC with a lot of "if (!isDarwin)". There are some places where I need help before saying the port is complete. I attached the diff file as a reference 1) In order to generate a creqv instruction before a vararg call, I created a new instruction in PPCInstrInfo.td: SETCR which uses the new XForm_1_ext format. It does not...

...ebugging and exception handling. Cheers, -- Jim On 2-Feb-07, at 08:58 AM, Nicolas Geoffray wrote: > Hi everyone, > > I have almost completed the implementation of a linux/ppc backend > in llvm. There were a few things to modify in > lib/Target/PowerPC with a lot of "if (!isDarwin)". > > There are some places where I need help before saying the port is > complete. I attached the diff file as a reference > > 1) In order to generate a creqv instruction before a vararg call, I > created a new instruction in PPCInstrInfo.td: SETCR which > uses the n...

...> > On 2-Feb-07, at 08:58 AM, Nicolas Geoffray wrote: > >> Hi everyone, >> >> >> I have almost completed the implementation of a linux/ppc backend in >> llvm. There were a few things to modify in >> >> lib/Target/PowerPC with a lot of "if (!isDarwin)". >> >> >> There are some places where I need help before saying the port is >> complete. I attached the diff file as a reference >> >> >> 1) In order to generate a creqv instruction before a vararg call, I >> created a new instruction in PPCI...

On Fri, 2 Feb 2007, Nicolas Geoffray wrote: > I have almost completed the implementation of a linux/ppc backend in llvm. Cool! > There were a few things to modify in > lib/Target/PowerPC with a lot of "if (!isDarwin)". Some meta comments: 1. Please don't change PPC -> llvmPPC. I assume that you did this because PPC is a #define in some system header. Please just add a '#undef PPC' where appropriate to make this unneeded. 2. The X86 backend has the unfortunate habit of saying &q...

...WN, PPC_ABI_ELFv1 and PPC_ABI_ELFv2. For 64-bit non-Darwin the TargetABI value is set to either ELF-variant in resetSubtargetFeatures(...) based on endianess (unless explicitly set previously). As I understand it ELFv2 is a new ABI but which ABI does ELFv1 map to? - Since isSVR4ABI() is defined as !isDarwin() it currently is possible for SVR4 and ELFv2 to be true at the same time which doesn't seem correct to me. - My understanding of SVR4ABI have been that it is the 32-bit PPC processor supplement from Sun. Is this correct? If so, which ABI is used for 64-bit non-Darwin? I'm trying to implem...

...like: void CopyFile(const sys::Path &Dest, const sys::Path &Src) { 2.3 X86 stuff Patch lib/Target/X86/X86SubTarget.cpp & X86JITInfo.cpp in such way: X86SubTarget.cpp: #if defined(__CYGWIN__) || defined(__MINGW32__) TargetType = isCygwin; #elif defined(__APPLE__) TargetType = isDarwin; #elif defined(_WIN32) TargetType = isWindows; #endif X86JITInfo.cpp: #if defined(__CYGWIN__) || defined(__APPLE__) || defined(__MINGW32__) ".globl _X86CompilationCallback\n" "_X86CompilationCallback:\n" #else ... #if defined(__CYGWIN__) || defined(__APPLE__) || defin...

...lse if (os == darwin && ppc64) then ... This is inefficient :) > 3) Create a new subtarget (but does it worth it? considering that the > difference between the 2 abis is minor) There is already a subtarget. In the call lowering code, just do something like: if (!PPCSubTarget->isDarwin()) ... insert creq here ... -Chris -- http://nondot.org/sabre/ http://llvm.org/

...for cygwin. Will this change in the future? > This may prompt thurther normalization, on the otherhand it may not :) Yes, I think it will. :) In particular, instead of a bunch of checks based on the target, what we really want is something like this: ... in the AsmPrinter ctor... if (isDarwin) { TargetUsesFooFeature = true; TargetUsesBarFeature = true; TargetUsesBazFeature = false; } else if (isCygwin) { ... } etc. Then instead of code that looks like this: if (!forCygwin && !forDarwin && !forWindows && I->hasInternalLinkage()) O...

...then the vectorizer would require fast-math flags in order to vectorize FP operations (similarly, gcc's man page says it requires -funsafe-math-optimizations for vectorization unless -mfpu=neon or similar is specified). In this context, this different-semantics query would return true if: !(isDarwin OR ARMISA >= v8 OR fpMath == NEON) and then we need to teach people to use -mfpu=neon ;) I think this more-or-less matches what you've proposed. Is that right? -Hal P.S. Looking at gcc's man page, gcc seems to use -mfpu for ARM and -mfpmath for x86. Do we use -mfpmath for both? ---...

Hi all, I'm currently implementing a linux/ppc target in llvm. The abis between Darwin/ppc and linux/ppc are different and I'm running into problems with vararg calls. Before a variadic method is called, an extra instruction must be executed (which is creqv 6, 6, 6). This instruction is not necessary in Darwin/ppc. I looked into the PowerPC target implementation and the code generation

On 22 March 2016 at 11:34, James Molloy <James.Molloy at arm.com> wrote: > I don’t think this part is right. The denormal flag would have to be set by > whatever code generates the FP instruction, which would be Clang’s codegen > layer. So the if (Darwin) would be there, not in TTI. Right, I meant the information to set/not set would be in TTI, not the actual setting. I don't

...riant in resetSubtargetFeatures(...) based on > > endianess > > (unless explicitly set previously). As I understand it ELFv2 is a > > new > > ABI but which ABI does ELFv1 map to? > > I hope the above makes it clearer. > > > - Since isSVR4ABI() is defined as !isDarwin() it currently is > > possible > > for SVR4 and ELFv2 to be true at the same time which doesn't seem > > correct to me. > > isSVR4ABI is true for either ELFv1 or ELFv2, and also for the 32-bit > SVR4 ABI. This should probably be cleaned up by having three > separ...

Here is a mod to X86 that allows GAS to be used with MS Visual C++. I introduces a 'forWindows' variable like 'forCygwin' in th X86SharedAsmPrinter class. This may prompt thurther normalization, on the otherhand it may not :) Aaron -------------- next part -------------- An HTML attachment was scrubbed... URL:

> It is simpler. There is not any Mach-O envelope. The platform linker > can directly read Mach-O files as well as llvm bit-code file (using > llvm bit-code file reader). > > > Not sure if/where the exact form of the Mach-O file that carries bit > > code is documented. Thanks for that. Yes, I see what you mean (no Mach-O envelope), yet there seems to be something

...ecified). In this context, this different-semantics query would return true if: The semantics is indeed different, VFP is IEEE-754 compliant while NEON is not. We don't want to stop the compiler from using VFP for FP math, but we want to be cautious when using NEON in the same way.. > !(isDarwin OR ARMISA >= v8 OR fpMath == NEON) > > and then we need to teach people to use -mfpu=neon ;) So, there's the catch. In GCC, -mfpu=neon means to use NEON, which is not enabled by default, so the compiler assumes that the user is aware that NEON FP is not IEEE compliant. I don't thi...

Hi Chris, Chris Lattner wrote: >> 2) Line 369 of PPCInstrInfo.td, we declare the non-callee saved registers. >> However, Linux and Darwin do not have the same set >> of non-callee saved registers. I don't know how to make the if(isDarwin) test >> in here >> > > Take a look at ARM/ARMRegisterInfo.td for an example of this I tried to define Defs just like ARMRegisterInfo.td does with different subtargets, but i get the obvious message: Value 'Defs' of type 'list<Register>' is incompatibl...

Hello, Does anyone know how to generate a Dwarf file for a Windows target? I discovered the DwarfWriter class, but I'm not sure how to add it to the pass manager. Also, what x86 subtarget should I use? From what I can tell, there are five choices: isELF, isDarwin, isCygwin, isMingw, and isWindows. isCygwin and isMingw appear to generate a COFF file in X86TargetMachine.cpp, but that seems unlikely because I don't see a COFF writer in the source code. The fifth choice, isWindows, appears to be the default Windows option that generates no debugging infor...

...rm info, we need to add a denormal flag to be set if fpmath=neon/sse/etc on all FP instructions, and in the vectorizer, we just test for that flag (which should also be set by fast-math). The Darwin vs. Linux problem is, then, moved to the target transform info, only setting the flag on ARM if... isDarwin OR ARMISA >= v8 OR fastMath OR fpMath == NEON Makes sense? cheers, --renato

> Aaah. Wasn't quite sure what you were doing here. I'm not positive > what llvm can emit via the writers (there's support for all parts of > the file format), but it could be extended to write one out. I'm just > not quite sure why :) > > -eric Well, ultimately I'm curious about what it would take to port a JVM based language (http://openquark.org) to

...get pieces in before the > whole thing is "done". > OK >> 2) Line 369 of PPCInstrInfo.td, we declare the non-callee saved registers. >> However, Linux and Darwin do not have the same set >> of non-callee saved registers. I don't know how to make the if(isDarwin) test >> in here >> > > Take a look at ARM/ARMRegisterInfo.td for an example of this. > > Great, thx for the hint >> 3) R31, which replaces R1 as stack pointer when there is a dynamic allocation >> in a method, must be seen as a callee-saved register an...