search for: iscube

Displaying 9 results from an estimated 9 matches for "iscube".

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2009 Aug 25
1
Problem with correct usage of formula environment
...n, I would like to incorporate a dummy variable for center points that is not a column of the design. Without this function, it would work like this (at least version 0.97 of package FrF2): require(FrF2) plan <- FrF2(8,4,ncenter=6) y <- rnorm(14) r.plan<-add.response(plan,y) lm(y~A+B+C+D+!iscube(r.plan), r.plan) Building the formula from within function formula.design works OK at first sight: > formula(r.plan) y ~ A + B + C + D + (!iscube(r.plan)) However, using the formula in a linear model call does not work in this case: > lm(r.plan) Fehler in inherits(x, "factor") :...
2014 Feb 19
0
[PATCH] nv50: enable cube map array texture support
...ering_nv50.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp @@ -664,7 +664,7 @@ NV50LoweringPreSSA::handleTEX(TexInstruction *i) bld.mkOp2(OP_MIN, TYPE_U32, src, src, bld.loadImm(NULL, 511)); i->setSrc(arg - 1, src); } - if (i->tex.target.isCube()) { + if (i->tex.target.isCube() && i->srcCount() > 4) { std::vector<Value *> acube, a2d; int c; @@ -681,9 +681,10 @@ NV50LoweringPreSSA::handleTEX(TexInstruction *i) for (c = 0; c < 3; ++c) i->setSrc(c, a2d[c]); -...
2014 Jul 05
1
[PATCH 1/2] nvc0/ir: use manual TXD when offsets are involved
...wering_nvc0.cpp index 0e24db7..398b28f 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -769,7 +769,8 @@ NVC0LoweringPass::handleTXD(TexInstruction *txd) if (dim > 2 || txd->tex.target.isCube() || arg > 4 || - txd->tex.target.isShadow()) + txd->tex.target.isShadow() || + txd->tex.useOffsets) return handleManualTXD(txd); for (int c = 0; c < dim; ++c) { -- 1.8.5.5
2017 Dec 20
2
[PATCH] gm107/ir: use lane 0 for manual textureGrad handling
...ADD) }; Value *def[4][4]; - Value *crd[3]; + Value *crd[3], *arr, *shadow; Value *tmp; Instruction *tex, *add; - Value *zero = bld.loadImm(bld.getSSA(), 0); + Value *quad = bld.mkImm(SHFL_BOUND_QUAD); int l, c; const int dim = i->tex.target.getDim() + i->tex.target.isCube(); const int array = i->tex.target.isArray(); @@ -115,35 +112,40 @@ GM107LoweringPass::handleManualTXD(TexInstruction *i) for (c = 0; c < dim; ++c) crd[c] = bld.getScratch(); + arr = bld.getScratch(); + shadow = bld.getScratch(); tmp = bld.getScratch(); for (l =...
2019 Oct 14
1
[PATCH] gm107/ir: fix loading z offset for layered 3d image bindings
...ceCoordsGM107(TexInstruction *su) +TexInstruction * +NVC0LoweringPass::processSurfaceCoordsGM107(TexInstruction *su, Instruction *ret[4]) { const int slot = su->tex.r; const int dim = su->tex.target.getDim(); - const int arg = dim + (su->tex.target.isArray() || su->tex.target.isCube()); + const bool array = su->tex.target.isArray() || su->tex.target.isCube(); + const int arg = dim + array; Value *ind = su->getIndirectR(); Value *handle; + Instruction *pred = NULL, *pred2d = NULL; int pos = 0; bld.setPosition(su, false); @@ -2489,67 +2511,153 @@...
2013 Dec 08
0
[PATCH] nv50: TXF already has integer arguments, don't try to convert from f32
...Value *layer = i->getSrc(arg - 1); + LValue *src = new_LValue(func, FILE_GPR); + bld.mkCvt(OP_CVT, TYPE_U32, src, TYPE_F32, layer); + bld.mkOp2(OP_MIN, TYPE_U32, src, src, bld.loadImm(NULL, 511)); + i->setSrc(arg - 1, src); + } if (i->tex.target.isCube()) { std::vector<Value *> acube, a2d; int c; -- 1.8.3.2
2014 Mar 20
0
[PATCH] nvc0/ir: move sample id to second source arg to fix sampler2DMS
...p index 3840f75..62241ba 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -666,8 +666,9 @@ NVC0LoweringPass::handleTEX(TexInstruction *i) const int dim = i->tex.target.getDim() + i->tex.target.isCube(); const int arg = i->tex.target.getArgCount(); const int lyr = arg - (i->tex.target.isMS() ? 2 : 1); + const int chipset = prog->getTarget()->getChipset(); - if (prog->getTarget()->getChipset() >= NVISA_GK104_CHIPSET) { + if (chipset >= NVISA_GK104_CHIPSET)...
2017 Dec 20
0
[PATCH] gm107/ir: use lane 0 for manual textureGrad handling
...alue *crd[3]; > + Value *crd[3], *arr, *shadow; > Value *tmp; > Instruction *tex, *add; > - Value *zero = bld.loadImm(bld.getSSA(), 0); > + Value *quad = bld.mkImm(SHFL_BOUND_QUAD); > int l, c; > const int dim = i->tex.target.getDim() + i->tex.target.isCube(); > const int array = i->tex.target.isArray(); > @@ -115,35 +112,40 @@ GM107LoweringPass::handleManualTXD(TexInstruction *i) > > for (c = 0; c < dim; ++c) > crd[c] = bld.getScratch(); > + arr = bld.getScratch(); > + shadow = bld.getScratch(); >...
2014 Apr 04
2
[PATCH 1/2] nvc0: add support for texture gather
...K110::emitTEX(const TexInstruction *i) srcId(i->src(0), 10); srcId(i, src1, 23); - // if (i->op == OP_TXG) code[0] |= i->tex.gatherComp << 5; + if (i->op == OP_TXG) code[1] |= i->tex.gatherComp << 13; // texture target: code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7; @@ -1666,6 +1674,7 @@ CodeEmitterGK110::emitInstruction(Instruction *insn) case OP_TXL: case OP_TXD: case OP_TXF: + case OP_TXG: case OP_TXLQ: emitTEX(insn->asTex()); break; diff --git a/src/gallium/drivers/nouv...