search for: isconvertibletothreeaddress

Displaying 6 results from an estimated 6 matches for "isconvertibletothreeaddress".

2008 Apr 27
2
[LLVMdev] Questions for new Backend
...;ADD $sX, $sY"), [(set CPURegs:$sX, (add CPURegs:$isX, CPURegs:$sY))]>; Where CPURegs is my class of register. I suppose that the pass TwoAddressInstructionPass will make the $sX and $isX register the same (it unify the out reg and the first in reg?) ? When should I set isConvertibleToThreeAddress to 1? When I have another form of the instruction which take a three addresses? 2) Instr class contain the following properties. I suppose they must be set correctly for? I have some question on them. If only '?' I don't understand at all, if no comment then I think I understand. in...
2007 Sep 11
0
[LLVMdev] RFC: Tail call optimization X86
...6tailcall. It's not currently used so feel free to change its patterns, etc. 5. +// the following two instructions are used to adjust the stack pointer +// in the case where the callee has more arguments than the caller +// an area is created where the return addr can be safely moved to +let isConvertibleToThreeAddress = 1 in { // Can transform into LEA. +def TCADD32ri : Ii32<0x81, MRM0r, (outs GR32:$dst), (ins GR32: $src1, i32imm:$src2), + "add{l}\t{$src2, $dst|$dst, $src2}", + []>; +} + +def TCSUB32ri : Ii32<0x81, MRM5r, (outs GR32:$dst), (ins GR32:...
2007 Sep 06
2
[LLVMdev] RFC: Tail call optimization X86
Hi Evan, first off thanks to you and Chris for taking time. On 6 Sep 2007, at 00:57, Evan Cheng wrote: > We'd like to see tail call optimization to be similar to the target > independent lowering of ISD::CALL nodes. These are auto-generated > from ???CallingConv.td files. Some target specific details such as > function address register (ECX in your example) should be coded in
2008 Apr 27
0
[LLVMdev] Questions for new Backend
...t > unify the out reg and the first in reg?) ? Yes. 'isTwoAddress' is just shorthand for saying that Xs and isX are constrainted to be tied together. You can constrain any two registers of the same class with 'Constraints = "$src = $dst"'. > When should I set isConvertibleToThreeAddress to 1? When I have > another form > of the instruction which take a three addresses? Yes. This is useful when the two address form is more efficient than the three address form in some way. This will cause the codegen to prefer the two address form, but fall back to the 3-addr one whe...
2015 Jul 17
3
[LLVMdev] 2-address and 3-address instructions
I am writing a backend for an experimental machine that has both 2-address and 3-address versions of some instructions. The 2-address versions are more compact and thus preferred when applicable. How does one go about generating the most compact version? 1. At instruction selection, is there a predicate that can test whether one of the input sources is dead, thus allowing the selection of the
2007 Sep 11
2
[LLVMdev] RFC: Tail call optimization X86
...o > change its patterns, etc. > Okay dokey. > 5. > +// the following two instructions are used to adjust the stack > pointer > +// in the case where the callee has more arguments than the caller > +// an area is created where the return addr can be safely moved to > +let isConvertibleToThreeAddress = 1 in { // Can transform into LEA. > +def TCADD32ri : Ii32<0x81, MRM0r, (outs GR32:$dst), (ins GR32: > $src1, i32imm:$src2), > + "add{l}\t{$src2, $dst|$dst, $src2}", > + []>; > +} > + > +def TCSUB32ri : Ii32<0x81, MR...