search for: isclone

...mitter.cpp b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp index 65ee3816f84..4780f6f0e59 100644 --- a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp +++ b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp @@ -243,18 +243,21 @@ void InstrEmitter::CreateVirtualRegisters(SDNode *Node,      if (!VRBase && !IsClone && !IsCloned)        for (SDNode *User : Node->uses()) {          if (User->getOpcode() == ISD::CopyToReg &&              User->getOperand(2).getNode() == Node &&              User->getOperand(2).getResNo() == i) {            unsigned Reg = cast<Register...

On Aug 27, 2010, at 11:53 AMPDT, Yuri wrote: > On 08/27/2010 11:32, Yuri wrote: >> As I understand only one of TCRETURNri64 and RET should be created. >> I have sources of rev.112200. >> >> Here is the stack when TCRETURNri64 instruction is created: >> #1 0x0000000802c8b4e2 in llvm::MachineFunction::CreateMachineInstr >> (this=0x30eb000, TID=@0x803a78940,

...lse) at /tmp/llvm-svn/llvm/lib/CodeGen/MachineFunction.cpp:153 #2 0x00000008028ea302 in llvm::BuildMI (MF=@0x30eb000, DL={LineCol = 0, ScopeIdx = 0}, TID=@0x803a9f840) at MachineInstrBuilder.h:147 #3 0x0000000803164513 in llvm::InstrEmitter::EmitMachineNode (this=0x7fffffff7f80, Node=0x4b6c510, IsClone=false, IsCloned=false, VRBaseMap=@0x7fffffff8050) at /tmp/llvm-svn/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp:671 #4 0x00000008031f6bdf in llvm::InstrEmitter::EmitNode (this=0x7fffffff7f80, Node=0x4b6c510, IsClone=false, IsCloned=false, VRBaseMap=@0x7fffffff8050) at InstrEmitter.h:118 #5...

On 08/27/2010 11:32, Yuri wrote: > As I understand only one of TCRETURNri64 and RET should be created. > I have sources of rev.112200. > > Here is the stack when TCRETURNri64 instruction is created: > #1 0x0000000802c8b4e2 in llvm::MachineFunction::CreateMachineInstr > (this=0x30eb000, TID=@0x803a78940, DL={LineCol = 0, ScopeIdx = 0}, > NoImp=false) at

...SDValue Op, > unsigned IIOpNum, > const MCInstrDesc *II, > DenseMap<SDValue, unsigned> &VRBaseMap, > bool IsDebug, bool IsClone, bool IsCloned) { > //llvm::errs() << "Op = "; > //Op.dump(); > assert(Op.getValueType() != MVT::Other && > Op.getValueType() != MVT::Glue && > "Chain and glue operands should occur at end of operand list!"); > //...

...SDValue Op, >> unsigned IIOpNum, >> const MCInstrDesc *II, >> DenseMap<SDValue, unsigned> &VRBaseMap, >> bool IsDebug, bool IsClone, bool >> IsCloned) { >> //llvm::errs() << "Op = "; >> //Op.dump(); >> assert(Op.getValueType() != MVT::Other && >> Op.getValueType() != MVT::Glue && >> "Chain and glue operands should occur at end of op...

...In my test, I have a float select that has to be implemented with a diamond CFG by the scheduler. The high level ScheduleDAGSDNodes::EmitSchedule does this: for (unsigned i = 0, e = Sequence.size(); i != e; i++) { [...] Emitter.EmitNode(SU->getNode(), SU->OrigNode != SU, SU->isCloned, VRBaseMap); [...] } TheInstrEmitter::EmitMachineNode does this: if (II.usesCustomInsertionHook()) { // Insert this instruction into the basic block using a target // specific inserter which may returns a new basic block. bool AtEnd = InsertPos == MBB-&gt...

...SDValue Op, >> unsigned IIOpNum, >> const MCInstrDesc *II, >> DenseMap<SDValue, unsigned> &VRBaseMap, >> bool IsDebug, bool IsClone, bool IsCloned) { >> //llvm::errs() << "Op = "; >> //Op.dump(); >> assert(Op.getValueType() != MVT::Other && >> Op.getValueType() != MVT::Glue && >> "Chain and glue operands should occur at end of operand lis...

> On Aug 24, 2015, at 1:30 PM, Ryan Taylor <ryta1203 at gmail.com> wrote: > > I'm trying to do something like this: > > // Dst = NewVReg's reg class > // *II = MCInstrDesc > // IIOpNum = II Operand Num > > if (TRI->getCommonSubClass(DstRC, TRI->getRegClass(II->OpInfo[IIOpNum].RegClass)) == DstRC) > MRI->setRegClass(VReg, DstRC); >

...;>>>>> const MCInstrDesc *II, >>>>>>> DenseMap<SDValue, unsigned> >>>>>>> &VRBaseMap, >>>>>>> bool IsDebug, bool IsClone, bool >>>>>>> IsCloned) { >>>>>>> //llvm::errs() << "Op = "; >>>>>>> //Op.dump(); >>>>>>> assert(Op.getValueType() != MVT::Other && >>>>>>> Op.getValueType...

...;>> const MCInstrDesc *II, >>>>>>>> DenseMap<SDValue, unsigned> >>>>>>>> &VRBaseMap, >>>>>>>> bool IsDebug, bool IsClone, bool >>>>>>>> IsCloned) { >>>>>>>> //llvm::errs() << "Op = "; >>>>>>>> //Op.dump(); >>>>>>>> assert(Op.getValueType() != MVT::Other && >>>>>>>>...

...const MCInstrDesc *II, >>>>>>>>> DenseMap<SDValue, unsigned> >>>>>>>>> &VRBaseMap, >>>>>>>>> bool IsDebug, bool IsClone, bool >>>>>>>>> IsCloned) { >>>>>>>>> //llvm::errs() << "Op = "; >>>>>>>>> //Op.dump(); >>>>>>>>> assert(Op.getValueType() != MVT::Other && >>>>>&...

...const MCInstrDesc *II, >>>>>>>>>> DenseMap<SDValue, unsigned> >>>>>>>>>> &VRBaseMap, >>>>>>>>>> bool IsDebug, bool IsClone, bool >>>>>>>>>> IsCloned) { >>>>>>>>>> //llvm::errs() << "Op = "; >>>>>>>>>> //Op.dump(); >>>>>>>>>> assert(Op.getValueType() != MVT::Other && >&...

...const MCInstrDesc *II, >>>>>>>>>>> DenseMap<SDValue, unsigned> >>>>>>>>>>> &VRBaseMap, >>>>>>>>>>> bool IsDebug, bool IsClone, >>>>>>>>>>> bool IsCloned) { >>>>>>>>>>> //llvm::errs() << "Op = "; >>>>>>>>>>> //Op.dump(); >>>>>>>>>>> assert(Op.getValueType() != MVT::Other...