Displaying 5 results from an estimated 5 matches for "isassignedreg".
2008 May 28
3
[LLVMdev] Possible VirtRegMap Bug
I've been playing around with spillers and found that the SimpleSpiller fails
badly on a particular code.
The problem arises because SimpleSpiller does the test
VRM.isAssignedReg(virtReg) which is implemented as:
00183 bool isAssignedReg(unsigned virtReg) const {
00184 if (getStackSlot(virtReg) == NO_STACK_SLOT &&
00185 getReMatId(virtReg) == NO_STACK_SLOT)
00186 return true;
00187 // Split register can be assigned a physical regis...
2008 May 30
0
[LLVMdev] Possible VirtRegMap Bug
On May 27, 2008, at 5:36 PM, David Greene wrote:
> I've been playing around with spillers and found that the
> SimpleSpiller fails
> badly on a particular code.
>
> The problem arises because SimpleSpiller does the test
> VRM.isAssignedReg(virtReg) which is implemented as:
>
> 00183 bool isAssignedReg(unsigned virtReg) const {
> 00184 if (getStackSlot(virtReg) == NO_STACK_SLOT &&
> 00185 getReMatId(virtReg) == NO_STACK_SLOT)
> 00186 return true;
> 00187 // Split register can...
2009 Jan 13
2
[LLVMdev] Possible bug in the ARM backend?
...ck*, 8> LiveInMBBs;
for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
LiveInterval &cur = *i->second;
unsigned Reg = 0;
bool isPhys = TargetRegisterInfo::isPhysicalRegister(cur.reg);
if (isPhys)
Reg = cur.reg;
else if (vrm_->isAssignedReg(cur.reg))
Reg = attemptTrivialCoalescing(cur, vrm_->getPhys(cur.reg));
if (!Reg)
continue;
// Ignore splited live intervals.
if (!isPhys && vrm_->getPreSplitReg(cur.reg))
continue;
for (LiveInterval::Ranges::const_iterator I = cur.begin(), E = cur.end...
2009 Jan 13
0
[LLVMdev] Possible bug in the ARM backend?
On Jan 13, 2009, at 12:27 AM, Roman Levenstein <romix.llvm at googlemail.com
> wrote:
> 2009/1/13 Evan Cheng <echeng at apple.com>:
>>
>> On Jan 7, 2009, at 2:48 AM, Roman Levenstein wrote:
>>
>>> bb368: 0x8fdad00, LLVM BB @0x8fc2c98, ID#1:
>>> Predecessors according to CFG: 0x8fdac90 (#0)
>>> %R0<def> = MOVi 0, 14, %reg0,
2009 Jan 13
2
[LLVMdev] Possible bug in the ARM backend?
2009/1/13 Evan Cheng <echeng at apple.com>:
>
> On Jan 7, 2009, at 2:48 AM, Roman Levenstein wrote:
>
>> bb368: 0x8fdad00, LLVM BB @0x8fc2c98, ID#1:
>> Predecessors according to CFG: 0x8fdac90 (#0)
>> %R0<def> = MOVi 0, 14, %reg0, %reg0
>> *** STR %LR<kill>, %R0<kill>, %reg0, 0, 14, %reg0, Mem:ST(4,4)
>> [0x8fc2d68 + 0]