search for: isalias

...ndefinedAtom object. Another approach is to use weak aliases. That is if a.o has an undefine for foo with a fallback of bar, that when parsing that .o file into atoms produces an UndefinedAtom for foo, but also a DefinedAtom with name=foo, weak (mergeAsWeak), hidden (scopeLinkageUnit), size=0, isAlias=true which aliases to bar. So, it any definition of foo does show up, it will override the weak alias. If not the weak alias will be used and change the reference to bar. I don't think the isAlias support is all wired up in lld. But weak aliases are something common in ELF. So would shou...

...tom object. > > Another approach is to use weak aliases. That is if a.o has an undefine for foo with a fallback of bar, that when parsing that .o file into atoms produces an UndefinedAtom for foo, but also a DefinedAtom with name=foo, weak (mergeAsWeak), hidden (scopeLinkageUnit), size=0, isAlias=true which aliases to bar. So, it any definition of foo does show up, it will override the weak alias. If not the weak alias will be used and change the reference to bar. > > I don't think the isAlias support is all wired up in lld. But weak aliases are something common in ELF. So w...

...ct. >> >> Another approach is to use weak aliases. That is if a.o has an undefine for foo with a fallback of bar, that when parsing that .o file into atoms produces an UndefinedAtom for foo, but also a DefinedAtom with name=foo, weak (mergeAsWeak), hidden (scopeLinkageUnit), size=0, isAlias=true which aliases to bar. So, it any definition of foo does show up, it will override the weak alias. If not the weak alias will be used and change the reference to bar. >> >> I don't think the isAlias support is all wired up in lld. But weak aliases are something common in E...

...rn MustAlias; >> >> , so I'm not sure how this would be done .. ? > > If you run with -enable-misched -enable-aa-sched-mi > > then you'll get this logic from the end of MIsNeedChainEdge: > > // The following interface to AA is fashioned after DAGCombiner::isAlias > // and operates with MachineMemOperand offset with some important > // assumptions: > // - LLVM fundamentally assumes flat address spaces. > // - MachineOperand offset can *only* result from legalization and > // cannot affect queries other than the trivial case of ove...

...t; does > > if (V1 == V2) return MustAlias; > > , so I'm not sure how this would be done .. ? If you run with -enable-misched -enable-aa-sched-mi then you'll get this logic from the end of MIsNeedChainEdge: // The following interface to AA is fashioned after DAGCombiner::isAlias // and operates with MachineMemOperand offset with some important // assumptions: // - LLVM fundamentally assumes flat address spaces. // - MachineOperand offset can *only* result from legalization and // cannot affect queries other than the trivial case of overlap // checki...

...>> >>> Another approach is to use weak aliases. That is if a.o has an undefine for foo with a fallback of bar, that when parsing that .o file into atoms produces an UndefinedAtom for foo, but also a DefinedAtom with name=foo, weak (mergeAsWeak), hidden (scopeLinkageUnit), size=0, isAlias=true which aliases to bar. So, it any definition of foo does show up, it will override the weak alias. If not the weak alias will be used and change the reference to bar. >>> >>> I don't think the isAlias support is all wired up in lld. But weak aliases are something comm...

...+ // If it's any of the following then it can't alias with anything but itself. + return isa<FrameIndexSDNode>(Base) || + isa<ConstantPoolSDNode>(Base) || + isa<GlobalAddressSDNode>(Base); + } + + /* FIXME: copied from DAGCombiner.cpp */ + /// isAlias - Return true if there is any possibility that the two addresses + /// overlap. + bool isAlias(SDOperand Ptr1, int64_t Size1, + const Value *SrcValue1, int SrcValueOffset1, + SDOperand Ptr2, int64_t Size2, + const Value *SrcValue2, int SrcValueOffset2) +...

Hi Hal, Thanks. How about a symbol with two different immediate offsets - the Value* would be the same, right? I don't see how AliasAnalysis::Location would handle this... And BasicAliasAnalysis does if (V1 == V2) return MustAlias; , so I'm not sure how this would be done .. ? /Jonas > -----Original Message----- > From: Hal Finkel [mailto:hfinkel at anl.gov] > Sent:

...#39;m not sure how this would be done .. ? > > > > If you run with -enable-misched -enable-aa-sched-mi > > > > then you'll get this logic from the end of MIsNeedChainEdge: > > > > // The following interface to AA is fashioned after > > DAGCombiner::isAlias > > // and operates with MachineMemOperand offset with some important > > // assumptions: > > // - LLVM fundamentally assumes flat address spaces. > > // - MachineOperand offset can *only* result from legalization > > and > > // cannot affect querie...

Hi Jochen, > My llvm version is 3.0 release. > I have a module generated by clang. When I optimize it, I first add an > inlining pass (llvm::createFunctionInliningPass), then these passes: > - own FunctionPass > - llvm::createPromoteMemoryToRegisterPass > - llvm::createInstructionCombiningPass > - llvm::createDeadInstEliminationPass > - llvm::createDeadStoreEliminationPass

Hi! My llvm version is 3.0 release. I have a module generated by clang. When I optimize it, I first add an inlining pass (llvm::createFunctionInliningPass), then these passes: - own FunctionPass - llvm::createPromoteMemoryToRegisterPass - llvm::createInstructionCombiningPass - llvm::createDeadInstEliminationPass - llvm::createDeadStoreEliminationPass - new llvm::DominatorTree() - new

Dan Gohman wrote: > I tried out your patch on x86 and it didn't appear to need any special changes. it might be needed to look at the addressing modes of a load/store to get the right offset. but i think it should work, if the lowering does not rewrite loads/stores into custom DAG nodes. > For the [??], it looks like the IsFrameIndex isn't getting set for the first > instruction

...t;)> [ORD=8] [ID=6] // This is Load from q[0] 0x3df5470: ch = STb_GP_V4 0x3df5170, 0x3df4e70, 0x3d9c130<Mem:ST1[@s]> [ID=4] // This is a store to s Underlying Values: @q = common global i8* null, align 4 @s = common global i8 0, align 1 The way inquiry is made is similar to DAGCombiner::isAlias() SDNode *SDN1; SDNode *SDN2; MachineMemOperand *MMOa; MachineMemOperand *MMOb; ... const MachineSDNode *MNb = dyn_cast<MachineSDNode>(SDN2); const MachineSDNode *MNa = dyn_cast<MachineSDNode>(SDN1); ... MMOa = !MNa->memoperands_empty() ? (*MNa->me...