search for: is64bitmode

On Tue, Apr 08, 2014 at 04:08:13PM +0400, Robert Khasanov wrote: > Hi Reid, > > Would you approve your patches r203146 and r202774 to be backported to > 3.4.1? They fix stability issues in x86 asm. > Hi Robert, I was able to merge r203146, but it used a c++11 feature: std::string::back() which I replaced with std::string::at(std::string::size() - 1). r202774 was not merged,

...86RegisterInfo::getX86RegNum(unsigned RegNo) const { >> +unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) { >> > > What happened to "const"? > I made the function static. >> + unsigned Size = GetInstSizeWithDesc(*MI, &Desc, IsPIC, >> Is64BitMode); >> + if (Desc.getOpcode() == X86::MOVPC32r) { >> + Size += GetInstSizeWithDesc(*MI, &get(X86::POP32r), IsPIC, >> Is64BitMode); >> + } >> > > I would prefer this special case is handled in GetInstSizeWithDesc(). > > I can not do that...

...o) const { >>> +unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) { >>> >> >> What happened to "const"? >> > > I made the function static. Ok. > > >>> + unsigned Size = GetInstSizeWithDesc(*MI, &Desc, IsPIC, >>> Is64BitMode); >>> + if (Desc.getOpcode() == X86::MOVPC32r) { >>> + Size += GetInstSizeWithDesc(*MI, &get(X86::POP32r), IsPIC, >>> Is64BitMode); >>> + } >>> >> >> I would prefer this special case is handled in GetInstSizeWithDesc(). >> &g...

...2; > - } > - break; > - } > - } > - } > - return REX; > -} > - > void Emitter::emitInstruction(const MachineInstr &MI, > const TargetInstrDesc *Desc) { > DOUT << MI; > @@ -584,7 +449,7 @@ > > if (Is64BitMode) { > // REX prefix > - unsigned REX = determineREX(MI); > + unsigned REX = X86InstrInfo::determineREX(MI); > if (REX) > MCE.emitByte(0x40 | REX); > } > @@ -632,7 +497,7 @@ > case X86::MOVPC32r: { > // This emits the "call" portion...

OK, here's a new patch that adds the infrastructure and the implementation for X86, ARM and PPC of GetInstSize and GetFunctionSize. Both functions are virtual functions defined in TargetInstrInfo.h. For X86, I moved some commodity functions from X86CodeEmitter to X86InstrInfo. What do you think? Nicolas Evan Cheng wrote: > > I think both of these belong to TargetInstrInfo. And

...ock()) { emitPCRelativeBlockAddress(MO.getMBB()); } else if (MO.isGlobalAddress()) { - bool NeedStub = !IsStatic || + bool NeedStub = Opcode == X86::TAILJMPd || Opcode == X86::TAILJMPr || + Opcode == X86::TAILJMPm || !IsStatic || (Is64BitMode && TM.getCodeModel() == CodeModel::Large); emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word, 0, 0, NeedStub);

In X86CodeGen.cpp, the following code appears in the handler used for CALL64pcrel32 instructions: // Assume undefined functions may be outside the Small codespace. bool NeedStub = (Is64BitMode && (TM.getCodeModel() == CodeModel::Large || TM.getSubtarget<X86Subtarget>().isTargetDarwin())) || Opcode == X86::TAILJMPd; emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word, MO.getOffset(), 0, NeedStub);...

On Jun 10, 2009, at 12:17 PM, Jeffrey Yasskin wrote: > In X86CodeGen.cpp, the following code appears in the handler used for > CALL64pcrel32 instructions: > > // Assume undefined functions may be outside the Small > codespace. > bool NeedStub = > (Is64BitMode && > (TM.getCodeModel() == CodeModel::Large || > TM.getSubtarget<X86Subtarget>().isTargetDarwin())) || > Opcode == X86::TAILJMPd; > emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word, > MO.getOffse...

...09, at 12:17 PM, Jeffrey Yasskin wrote: > >> In X86CodeGen.cpp, the following code appears in the handler used for >> CALL64pcrel32 instructions: >> >>       // Assume undefined functions may be outside the Small codespace. >>       bool NeedStub = >>         (Is64BitMode && >>             (TM.getCodeModel() == CodeModel::Large || >>              TM.getSubtarget<X86Subtarget>().isTargetDarwin())) || >>         Opcode == X86::TAILJMPd; >>       emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word, >>                    ...

...gt; >>>> >>> What happened to "const"? >>> >>> >> I made the function static. >> > > Ok. > > >> >>>> + unsigned Size = GetInstSizeWithDesc(*MI, &Desc, IsPIC, >>>> Is64BitMode); >>>> + if (Desc.getOpcode() == X86::MOVPC32r) { >>>> + Size += GetInstSizeWithDesc(*MI, &get(X86::POP32r), IsPIC, >>>> Is64BitMode); >>>> + } >>>> >>>> >>> I would prefer this special case is hand...

...uot;JIT relocation model must be set to static or default!"); > + > + MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>()); > + > II = ((X86TargetMachine&)MF.getTarget()).getInstrInfo(); > TD = ((X86TargetMachine&)MF.getTarget()).getTargetData(); > Is64BitMode = > ((X86TargetMachine&)MF.getTarget()).getSubtarget<X86Subtarget> > ().is64Bit(); > - > + > do { > MCE.startFunction(MF); > for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); > @@ -577,7 +585,8 @@ > case TargetInstrInfo::INLI...

...must be set to static or default!"); >> + >> + MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>()); >> + >> II = ((X86TargetMachine&)MF.getTarget()).getInstrInfo(); >> TD = ((X86TargetMachine&)MF.getTarget()).getTargetData(); >> Is64BitMode = >> ((X86TargetMachine&)MF.getTarget()).getSubtarget<X86Subtarget> >> ().is64Bit(); >> - >> + >> do { >> MCE.startFunction(MF); >> for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); >> @@ -577,7 +585,8 @@ >...

Hi everyone, Here's a patch that enables exception handling when jitting. I've copy/pasted _many_code from lib/Codegen/DwarfWriter.cpp, so we may need to factorize it, but the functionality is there and I'm very happy with it :) lli should now be able to execute the output from llvm-gcc when using exceptions (the UnwindInst instruction is not involved in this patch). Just add the

...&& > "JIT relocation model must be set to static or default!"); > + > + MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>()); > + > II = ((X86TargetMachine&)TM).getInstrInfo(); > TD = ((X86TargetMachine&)TM).getTargetData(); > Is64BitMode = TM.getSubtarget<X86Subtarget>().is64Bit(); > - > + > do { > MCE.startFunction(MF); > for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); > @@ -596,13 +605,13 @@ > // Remember the current PC offset, this is the PIC relocation > // base add...

Dear all, Here's a new patch with Evan's comments (thx Evan!) and some cleanups. Now the (duplicated) exception handling code is in a new file: lib/ExecutionEngine/JIT/JITDwarfEmitter. This patch should work on linux/x86 and linux/ppc (tested). Nicolas -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: jit-exceptions.patch URL: