Displaying 3 results from an estimated 3 matches for "is16bitmemoperand".
2015 Feb 23
2
[LLVMdev] clang .code16 with -Os producing larger code that it needs to
On Fri, 2015-02-20 at 13:47 -0500, Rafael EspĂndola wrote:
> > Your task, should you choose to accept it, is to make it cope with other
> > forms of relaxation where necessary.
>
> And if not, please open a bug :-)
http://llvm.org/bugs/show_bug.cgi?id=22662
FWIW I could reproduce the 'movl foo, %ebx' one but a relative jump
*was* using 16 bits (although gas uses 8):
2013 Dec 12
3
[LLVMdev] [RFC PATCH 1/2] x86: Fix ModR/M byte output in 16-bit addressing mode
...id X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
unsigned BaseRegNo = BaseReg ? GetX86RegNum(Base) : -1U;
+ // 16-bit addressing forms of the ModR/M byte have a different encoding for
+ // the R/M field and are far more limited in which registers can be used.
+ if (Is16BitMemOperand(MI, Op)) {
+ if (BaseReg) {
+ // See Table 2-1 "16-Bit Addressing Forms with the ModR/M byte"
+ static const int R16Table[] = { 0, 0, 0, 7, 0, 6, 4, 5 };
+ unsigned RMfield = R16Table[BaseRegNo];
+
+ assert(RMfield && "invalid 16-bit base register"...
2013 Dec 16
0
[LLVMdev] [RFC PATCH 1/2] x86: Fix ModR/M byte output in 16-bit addressing mode
...st MCInst
> &MI, unsigned Op,
>
> unsigned BaseRegNo = BaseReg ? GetX86RegNum(Base) : -1U;
>
> + // 16-bit addressing forms of the ModR/M byte have a different encoding
> for
> + // the R/M field and are far more limited in which registers can be
> used.
> + if (Is16BitMemOperand(MI, Op)) {
> + if (BaseReg) {
> + // See Table 2-1 "16-Bit Addressing Forms with the ModR/M byte"
> + static const int R16Table[] = { 0, 0, 0, 7, 0, 6, 4, 5 };
> + unsigned RMfield = R16Table[BaseRegNo];
> +
> + assert(RMfield && "inva...