search for: irqaction

...============================================================ --- a/arch/i386/kernel/i8259.c +++ b/arch/i386/kernel/i8259.c @@ -347,7 +347,18 @@ static irqreturn_t math_error_irq(int cp * New motherboards sometimes make IRQ 13 be a PCI interrupt, * so allow interrupt sharing. */ -static struct irqaction fpu_irq = { math_error_irq, 0, CPU_MASK_NONE, "fpu", NULL, NULL }; +static struct irqaction fpu_irq = { + .handler = math_error_irq, + .name = "fpu" +}; + +/* + * Most legacy systems want to cascade IRQ2 to slave PIC + */ +static struct irqaction cascade_action = { + .handler =...

...============================================================ --- a/arch/i386/kernel/i8259.c +++ b/arch/i386/kernel/i8259.c @@ -347,7 +347,18 @@ static irqreturn_t math_error_irq(int cp * New motherboards sometimes make IRQ 13 be a PCI interrupt, * so allow interrupt sharing. */ -static struct irqaction fpu_irq = { math_error_irq, 0, CPU_MASK_NONE, "fpu", NULL, NULL }; +static struct irqaction fpu_irq = { + .handler = math_error_irq, + .name = "fpu" +}; + +/* + * Most legacy systems want to cascade IRQ2 to slave PIC + */ +static struct irqaction cascade_action = { + .handler =...

See http://www.gossamer-threads.com/lists/xen/devel/297170 for some information on how to get this going. I''ve rebased and addressed the review comments. As before several of the patches are not to be applied because they can be done better using infrastructure from Julien''s "Allow Xen to boot with a raw Device Tree" patch. They are included for completeness. With

...----- kernel/irq/manage.c | 6 +++--- 4 files changed, 30 insertions(+), 10 deletions(-) diff -r 0fe1a980708b include/linux/interrupt.h --- a/include/linux/interrupt.h Thu Jan 17 14:48:56 2008 +1100 +++ b/include/linux/interrupt.h Thu Jan 17 15:42:01 2008 +1100 @@ -69,13 +69,26 @@ struct irqaction { }; extern irqreturn_t no_action(int cpl, void *dev_id); -extern int __must_check request_irq(unsigned int, irq_handler_t handler, + +/* Typesafe version of request_irq. Also takes old-style void * handlers. */ +#define request_irq(irq, handler, flags, name, dev_id) \ + __request_irq((irq),...

...----- kernel/irq/manage.c | 6 +++--- 4 files changed, 30 insertions(+), 10 deletions(-) diff -r 0fe1a980708b include/linux/interrupt.h --- a/include/linux/interrupt.h Thu Jan 17 14:48:56 2008 +1100 +++ b/include/linux/interrupt.h Thu Jan 17 15:42:01 2008 +1100 @@ -69,13 +69,26 @@ struct irqaction { }; extern irqreturn_t no_action(int cpl, void *dev_id); -extern int __must_check request_irq(unsigned int, irq_handler_t handler, + +/* Typesafe version of request_irq. Also takes old-style void * handlers. */ +#define request_irq(irq, handler, flags, name, dev_id) \ + __request_irq((irq),...

...rupt''s are disabled at this point */ spin_lock(&desc->lock); diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index f34e231..26bc55a 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -727,10 +727,9 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) goto out_thread; } else compat_irq_chip_set_default_handler(desc); -#if defined(CONFIG_IRQ_PER_CPU) + if (new->flags & IRQF_PERCPU) desc->status |= IRQ_PER_CPU; -#endif desc->status &= ~(IRQ_AUTODETECT | IRQ_WAITING | IRQ_ONESHOT | IRQ_INPROGRES...

...irq; unsigned long io_base; /* I/O port or memory-mapped I/O address. */ - char *remapped_io_base; /* Remapped virtual address of mmap I/O. */ + char __iomem *remapped_io_base; /* Remapped virtual address of MMIO. */ /* UART with IRQ line: interrupt-driven I/O. */ struct irqaction irqaction; /* UART with no IRQ line: periodically-polled I/O. */ @@ -207,17 +210,20 @@ static int ns16550_getc(struct serial_po static void pci_serial_early_init(struct ns16550 *uart) { - if ( !uart->ps_bdf_enable ) + if ( !uart->ps_bdf_enable || uart->io_base >= 0x10000...

See http://www.gossamer-threads.com/lists/xen/devel/297170 for some information on how to get this going. I''ve rebased and addressed the review comments. With this rebase I''ve picked up some patches from Julien which were required to do things properly, so the gic v7 and device blacklisting patches have been changed to use the proper mechanisms. Previously I was able to boot

Since OMAP UART has a few distinct features than common 8250 UART, I re-implemented its driver rather than porting it based on ns16550.c. There are mainly two big differences between the implementations. First, OMAP UART introduces the concept of register access mode, which divides the register map into seperated space. Switching the access mode is then necessary when configuring it. Second, THRE

...other paths. @@ -99,7 +101,13 @@ static int xen_slab_ready; static irqreturn_t xen_dummy_handler(int irq, void *dev_id) { + return IRQ_HANDLED; +} +static irqreturn_t +xen_resched_handler(int irq, void *dev_id) +{ + scheduler_ipi(); return IRQ_HANDLED; } @@ -110,7 +118,7 @@ static struct irqaction xen_ipi_irqaction = { }; static struct irqaction xen_resched_irqaction = { - .handler = xen_dummy_handler, + .handler = xen_resched_handler, .flags = IRQF_DISABLED, .name = "resched" }; diff --git a/arch/m32r/kernel/smp.c b/arch/m32r/kernel/smp.c index 31cef20..f0ecc3f 100644 --...

...other paths. @@ -99,7 +101,13 @@ static int xen_slab_ready; static irqreturn_t xen_dummy_handler(int irq, void *dev_id) { + return IRQ_HANDLED; +} +static irqreturn_t +xen_resched_handler(int irq, void *dev_id) +{ + scheduler_ipi(); return IRQ_HANDLED; } @@ -110,7 +118,7 @@ static struct irqaction xen_ipi_irqaction = { }; static struct irqaction xen_resched_irqaction = { - .handler = xen_dummy_handler, + .handler = xen_resched_handler, .flags = IRQF_DISABLED, .name = "resched" }; diff --git a/arch/m32r/kernel/smp.c b/arch/m32r/kernel/smp.c index 31cef20..f0ecc3f 100644 --...

...other paths. @@ -99,7 +101,13 @@ static int xen_slab_ready; static irqreturn_t xen_dummy_handler(int irq, void *dev_id) { + return IRQ_HANDLED; +} +static irqreturn_t +xen_resched_handler(int irq, void *dev_id) +{ + scheduler_ipi(); return IRQ_HANDLED; } @@ -110,7 +118,7 @@ static struct irqaction xen_ipi_irqaction = { }; static struct irqaction xen_resched_irqaction = { - .handler = xen_dummy_handler, + .handler = xen_resched_handler, .flags = IRQF_DISABLED, .name = "resched" }; diff --git a/arch/m32r/kernel/smp.c b/arch/m32r/kernel/smp.c index 31cef20..f0ecc3f 100644 --...

...; @@ -247,6 +250,8 @@ static void __cpuinit gic_hyp_init(void) GICH[GICH_HCR] = GICH_HCR_EN; GICH[GICH_MISR] = GICH_MISR_EOI; + gic.lr_mask = 0ULL; + INIT_LIST_HEAD(&gic.lr_pending); } /* Set up the GIC */ @@ -345,16 +350,51 @@ int __init setup_irq(unsigned int irq, struct irqaction *new) return rc; } -void gic_set_guest_irq(unsigned int virtual_irq, +static inline void gic_set_lr(int lr, unsigned int virtual_irq, unsigned int state, unsigned int priority) { - BUG_ON(virtual_irq > nr_lrs); - GICH[GICH_LR + virtual_irq] = state | + BUG_ON(lr > n...

...than necessary. */ + spin_lock_irqsave(&rtc_lock, flags); + retval = get_wallclock(); + spin_unlock_irqrestore(&rtc_lock, flags); + return retval; +} #ifdef CONFIG_CPU_FREQ /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency @@ -893,6 +903,11 @@ static struct irqaction irq0 = { timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL }; +inline void time_init_hook() +{ + setup_irq(0, &irq0); +} + void __init time_init(void) { if (nohpet) @@ -932,7 +947,7 @@ void __init time_init(void) vxtime.tsc_quot = (USEC_PER_MSEC << US...

Hi. This patchset implements ia64/pv_ops support which is the framework for virtualization support. Now all the comments so far have been addressed, but only a few exceptions. On x86 various ways to support virtualization were proposed, and eventually pv_ops won. So on ia64 the pv_ops strategy is appropriate too. Later I'll post the patchset which implements xen domU based on ia64/pv_ops.

Hi. This patchset implements ia64/pv_ops support which is the framework for virtualization support. Now all the comments so far have been addressed, but only a few exceptions. On x86 various ways to support virtualization were proposed, and eventually pv_ops won. So on ia64 the pv_ops strategy is appropriate too. Later I'll post the patchset which implements xen domU based on ia64/pv_ops.

...than necessary. */ + spin_lock_irqsave(&rtc_lock, flags); + retval = get_wallclock(); + spin_unlock_irqrestore(&rtc_lock, flags); + return retval; +} #ifdef CONFIG_CPU_FREQ /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency @@ -893,6 +903,11 @@ static struct irqaction irq0 = { timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL }; +inline void time_init_hook() +{ + setup_irq(0, &irq0); +} + void __init time_init(void) { if (nohpet) @@ -932,7 +947,7 @@ void __init time_init(void) vxtime.tsc_quot = (USEC_PER_MSEC << US...

Hi. This patchset is preparation patches for ia64/pv_ops support. They are almost trivial and mainly make kernel paravirtualization friendly. thanks, Diffstat: arch/ia64/kernel/irq_ia64.c | 1 - include/asm-ia64/intrinsics.h | 11 +++++++++++ include/asm-ia64/mmu_context.h | 6 +----- include/asm-ia64/smp.h | 2 ++ include/asm-ia64/system.h | 10 ++++++++-- 5 files

Hi. This patchset implements ia64/pv_ops support which is the framework for virtualization support. Please review and comments. On x86 various ways to support virtualization were proposed, and eventually pv_ops won. So on ia64 the pv_ops strategy is appropriate too. Later I'll post the patchset which implements xen domU based on ia64/pv_ops. Currently only ia64/xen pv_ops implementation

Hi. This patchset implements ia64/pv_ops support which is the framework for virtualization support. Please review and comments. On x86 various ways to support virtualization were proposed, and eventually pv_ops won. So on ia64 the pv_ops strategy is appropriate too. Later I'll post the patchset which implements xen domU based on ia64/pv_ops. Currently only ia64/xen pv_ops implementation