Displaying 7 results from an estimated 7 matches for "ipdps".
2016 Feb 24
1
Publication : CERE LLVM Based Codelet Extractor and REplayer
...M. Popov, and W. Jalby
ACM Transactions on
Architecture and Code Optimization (TACO), 2015.
"Pcere: Fine-grained
parallel benchmark decomposition for scalability prediction"
M. Popov,
C. Akel, F. Conti, W. Jalby, and P. de Oliveira Castro
Parallel and
Distributed Processing Symposium (IPDPS), 2015 IEEE International.
You
can find more info about our tool at
http://benchmark-subsetting.github.io/cere/.
Thanks,
Mihail
Popov
--
PhD student
University of
Versailles
@article{castro2015cere,
title={CERE: LLVM-Based Codelet
Extractor and REplayer for Piecewise Benchmarking and Optimi...
2018 Jun 02
2
LoopIdiomRecognize is not recognizing the ctpop idiom
...a &= a - 1;
//...
}
return c;
}
Is there any good paper discussing this type of loop idiom recognitions? I found only
a vaguely related paper: "Automatic Recognition of Performance Idioms in Scientific
Applications", IPDPS 2011 (http://www.sdsc.edu/~allans/ipdps11.pdf).
Thank you very much,
Alex
2009 Feb 28
2
Xen and CUDA Virtualization
Hello,
I am new to Xen and I have class project to develop in Virtualization course. One of these projects in about nVidia CUDA Virtualization.
As far as I understand from the architecuture of Xen, for virtualizing CUDA on Xen, I will have to prepare a back-end (for Dom 0) and front-end (for Dom U) drivers for CUDA. Is this right?
Also, from where can we get the source code of latest nVidia
2016 Aug 31
2
Publication: "Archer: Effectively Spotting Data Races in Large OpenMP Applications"
...ks,
-- Zvonimir
On Tue, Jun 21, 2016 at 12:07 PM Zvonimir Rakamaric <zvonimir at cs.utah.edu>
wrote:
> Hi,
>
> We recently published a paper that leverages clang/LLVM (through
> ThreadSanitizer) to dynamically detect data races in OpenMP programs:
> http://soarlab.org/2016/02/ipdps2016-agralslpm/
>
> You can find all the required info (PDF, title, abstract, etc.) at the
> above webpage.
>
> I would appreciate if you could add this paper to your list of LLVM-based
> publications.
>
> Thanks!
>
> Best,
> -- Zvonimir
>
-------------- next part...
2016 Mar 02
4
Proposal for function vectorization and loop vectorization with function calls
...e.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4 ]]
3. The first paper on SIMD extensions and implementations:
"Compiling C/C++ SIMD Extensions for Function and Loop Vectorizaion on
Multicore-SIMD Processors" by Xinmin Tian, Hideki Saito, Milind Girkar,
Serguei Preis, Sergey Kozhukhov, et al., IPDPS Workshops 2012, pages 2349--2358
[[Note: the first implementation and the paper were done before VectorABI was
finalized with the GCC community and Redhat. The latest VectorABI
version for OpenMP 4.5 is ready to be published]]
Proposed Implementation
=======================
1. Cla...
2016 Mar 02
2
Proposal for function vectorization and loop vectorization with function calls
...ppCfN1rZ4
> ]]
>
> 3. The first paper on SIMD extensions and implementations:
> "Compiling C/C++ SIMD Extensions for Function and Loop Vectorizaion on
> Multicore-SIMD Processors" by Xinmin Tian, Hideki Saito, Milind
> Girkar, Serguei Preis, Sergey Kozhukhov, et al., IPDPS Workshops 2012,
> pages 2349--2358
> [[Note: the first implementation and the paper were done before VectorABI was
> finalized with the GCC community and Redhat. The latest VectorABI
> version for OpenMP 4.5 is ready to be published]]
>
>
> Proposed Implementat...
2016 Mar 02
5
RFC: Implementing the Swift calling convention in LLVM and Clang
> On Mar 2, 2016, at 1:33 AM, Renato Golin <renato.golin at linaro.org> wrote:
>
> On 2 March 2016 at 01:14, John McCall via llvm-dev
> <llvm-dev at lists.llvm.org> wrote:
>> Hi, all.
>> - We sometimes want to return more values in registers than the convention normally does, and we want to be able to use both integer and floating-point registers. For