search for: iommu_enabled

...isabled until iommu_setup() is entered. Originally-by: Ronny Hegewald <ronny.hegewald@online.de> In order for iommu_enable to be off initially, iommu_supports_eim() must not depend on it anymore, nor must acpi_parse_dmar(). The former in turn requires that iommu_intremap gets uncoupled from iommu_enabled (in particular, failure during IOMMU setup should no longer result in iommu_intremap getting cleared by generic code; IOMMU specific code can still do so provided in can live with the consequences). This could have the nice side effect of allowing to use "iommu=off" even when x2APIC was...

...ers/passthrough/iommu.c.org 2012-10-05 03:38:33.000000000 +0000 +++ xen/drivers/passthrough/iommu.c 2012-10-17 22:58:07.000000000 +0000 @@ -38,7 +38,7 @@ * no-intremap Disable VT-d Interrupt Remapping */ custom_param("iommu", parse_iommu_param); -bool_t __read_mostly iommu_enabled = 1; +bool_t __read_mostly iommu_enabled = 0; bool_t __read_mostly force_iommu; bool_t __initdata iommu_dom0_strict; bool_t __read_mostly iommu_verbose; @@ -51,6 +51,8 @@ bool_t __read_mostly amd_iommu_debug; bool_t __read_mostly amd_iommu_perdev_intremap; +bool_t iommu_enabled_default = 1;...

1: IOMMU: properly check whether interrupt remapping is enabled 2: AMD IOMMU: only disable when certain IVRS consistency checks fail 3: VT-d: deal with 5500/5520/X58 errata Patch 1 and 2 are version 2 of a previously submitted, then withdrawn patch following up after XSA-36. Patch 3 is version 3 of a patch previously sent by Malcolm and Andrew. Signed-off-by: Jan Beulich

Introduce a new flag to disable iommu emulation on old iommu systems. This patch is taken from my v4 patch queue, which is till pending, to make old or non-iommu system to run cleanly without interfered by iommuv2 codes. This might be helpful to isolate iommuv2 code in debugging unstable regressions. The reset part of v4 will be re-based. Thanks, Wei Signed-off-by: Wei Wang

...the ept flush + * + * Read-then-write is OK because we hold the p2m lock. */ old_entry = *ept_entry; if ( mfn_valid(mfn_x(mfn)) || direct_mmio || p2m_is_paged(p2mt) || @@ -390,10 +392,10 @@ new_entry.access = p2ma; new_entry.rsvd2_snp = (iommu_enabled && iommu_snoop); - if ( new_entry.mfn == mfn_x(mfn) ) + new_entry.mfn = mfn_x(mfn); + + if ( old_entry.mfn == new_entry.mfn ) need_modify_vtd_table = 0; - else - new_entry.mfn = mfn_x(mfn); ept_p2m_...

Hi Tim, Could you please have a look at this bug? Thanks a lot. http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=1774 Best Regards, Yongjie Ren (Jay) _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

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...controls( "VMEntry Control", min, opt, MSR_IA32_VMX_ENTRY_CTLS, &mismatch); @@ -955,6 +956,9 @@ static int construct_vmcs(struct vcpu *v) vmx_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_EIP, MSR_TYPE_R | MSR_TYPE_W); if ( paging_mode_hap(d) && (!iommu_enabled || iommu_snoop) ) vmx_disable_intercept_for_msr(v, MSR_IA32_CR_PAT, MSR_TYPE_R | MSR_TYPE_W); + if ( (vmexit_ctl & VM_EXIT_CLEAR_BNDCFGS) && + (vmentry_ctl & VM_ENTRY_LOAD_BNDCFGS) ) + vmx_disable_intercept_for_msr(v, MSR_IA32_BNDCFGS, MSR_...

Under the assumption that in these cases recurring faults aren''t a security issue and it can be expected that the drivers there are going to try to take care of the problem. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -625,6 +625,18 @@ static void parse_event_log_entry(struct

These two patches were originally part of the XSM series that I have posted, and remain prerequisites for that series. However, they are independent of the XSM changes and are a useful simplification regardless of the use of XSM. The Acked-bys on these patches were provided before rebasing them over the copyback changes in 26268:1b72138bddda, which had minor conflicts that I resolved. [PATCH

From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):

Konrad, et al, I am seeing visual corruption (almost like an interlacing problem) with i915 under Xen on some platforms using linux-3.8. See attached file for an example of the visual corruption. This particular platform is an HP Elitebook 2540p The same kernel and ramdisk, when booted as native linux does not show this corruption. dmesg is attached, as well (out.txt) - but I did not see