search for: io_apic_read

...-156,6 +156,52 @@ nomem: return 0; } +union entry_union { + struct { u32 w1, w2; }; + struct IO_APIC_route_entry entry; +}; + +static struct IO_APIC_route_entry __ioapic_read_entry(int apic, int pin, int raw) +{ + unsigned int (*read)(unsigned int, unsigned int) + = raw ? __io_apic_read : io_apic_read; + union entry_union eu; + eu.w1 = (*read)(apic, 0x10 + 2 * pin); + eu.w2 = (*read)(apic, 0x11 + 2 * pin); + return eu.entry; +} + +static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin, int raw) +{ + struct IO_APIC_route_entry entry; + unsigned long...

...-156,6 +156,52 @@ nomem: return 0; } +union entry_union { + struct { u32 w1, w2; }; + struct IO_APIC_route_entry entry; +}; + +static struct IO_APIC_route_entry __ioapic_read_entry(int apic, int pin, int raw) +{ + unsigned int (*read)(unsigned int, unsigned int) + = raw ? __io_apic_read : io_apic_read; + union entry_union eu; + eu.w1 = (*read)(apic, 0x10 + 2 * pin); + eu.w2 = (*read)(apic, 0x11 + 2 * pin); + return eu.entry; +} + +static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin, int raw) +{ + struct IO_APIC_route_entry entry; + unsigned long...

...- entry = irq_2_pin + entry->next; - } -} - -static void __modify_IO_APIC_irq (unsigned int irq, unsigned long enable, unsigned long disable) -{ - struct irq_pin_list *entry = irq_2_pin + irq; - unsigned int pin, reg; - - for (;;) { - pin = entry->pin; - if (pin == -1) - break; - reg = io_apic_read(entry->apic, 0x10 + pin*2); - reg &= ~disable; - reg |= enable; - io_apic_modify(entry->apic, 0x10 + pin*2, reg); - if (!entry->next) - break; - entry = irq_2_pin + entry->next; - } -} - -/* mask = 1 */ -static void __mask_IO_APIC_irq (unsigned int irq) -{ - __modify_IO_APIC_...

...- entry = irq_2_pin + entry->next; - } -} - -static void __modify_IO_APIC_irq (unsigned int irq, unsigned long enable, unsigned long disable) -{ - struct irq_pin_list *entry = irq_2_pin + irq; - unsigned int pin, reg; - - for (;;) { - pin = entry->pin; - if (pin == -1) - break; - reg = io_apic_read(entry->apic, 0x10 + pin*2); - reg &= ~disable; - reg |= enable; - io_apic_modify(entry->apic, 0x10 + pin*2, reg); - if (!entry->next) - break; - entry = irq_2_pin + entry->next; - } -} - -/* mask = 1 */ -static void __mask_IO_APIC_irq (unsigned int irq) -{ - __modify_IO_APIC_...

...rangeset_new(NULL, "r/o mmio ranges", + RANGESETF_prettyprint_hex); + if ( smp_found_config ) nr_irqs_gsi = 0; for ( i = 0; i < nr_ioapics; i++ ) @@ -2507,6 +2510,11 @@ void __init init_ioapic_mappings(void) reg_01.raw = io_apic_read(i, 1); nr_ioapic_entries[i] = reg_01.bits.entries + 1; nr_irqs_gsi += nr_ioapic_entries[i]; + + if ( rangeset_add_singleton(mmio_ro_ranges, + ioapic_phys >> PAGE_SHIFT) ) + printk(KERN_ERR "Failed...

The formatting of the IO-APIC debug key info has niggled me for a while, and with the latest interrupt bug I am chasing, has finally motivated me to fix it. The attached patch causes all columns to line up, and removes the comma which served no purpose in combination with the spaces already present. -- Andrew Cooper - Dom0 Kernel Engineer, Citrix XenServer T: +44 (0)1223 225 900,

...e to lack of memory\n"); + return 1; + } + + entry = ioapic_pm_state; + spin_lock_irqsave(&ioapic_lock, flags); + for (apic = 0; apic < nr_ioapics; apic++) { + for (i = 0; i < nr_ioapic_registers[apic]; i ++, entry ++ ) { + *(((int *)entry) + 1) = io_apic_read(apic, 0x11 + 2 * i); + *(((int *)entry) + 0) = io_apic_read(apic, 0x10 + 2 * i); + } + } + spin_unlock_irqrestore(&ioapic_lock, flags); + + return 0; +} + +int ioapic_resume(void) +{ + struct IO_APIC_route_entry *entry; + unsigned long flags; + union IO_APIC_...

Hi Ingo, Here''s the chunk of patches to add Xen Dom0 support (it''s probably worth creating a new xen/dom0 topic branch for it). A dom0 Xen domain is basically the same as a normal domU domain, but it has extra privileges to directly access hardware. There are two issues to deal with: - translating to and from the domain''s pseudo-physical addresses and real machine