search for: inw

...pkg <- select.list(sort(.packages(all.available = TRUE))) + if(nchar(pkg)) library(pkg, character.only=TRUE)}) Loading required package: grid > m1=matrix(scan(file="C:/Users/Roymohan/Desktop/meta.txt"), ncol=4, byrow=TRUE) Read 208 items > oddsratio=m1[,2] > seinor=m1[,3] > inw=m1[,4] > c1=c("Cross-Drew (1974)", "Ahlstrom & Havighurst (1982)", "Litton & Marye (1981)", "Gold & Mattick (1974)", "Willman & Snortum (1982)", "Leiber & Mawhorr (1995)", "Hackler & Hagan (1974)", &quo...

Couple of patches to fix an overflow, optimize a bit and support bigger resolutions using Windows 8.

...n ret; +} + +static inline VMI_UINT8 vmi_inb(const VMI_UINT16 port) +{ + VMI_UINT8 ret; + vmi_wrap_call( + INB, "inb %w0, %%al", + VMI_OREG1(ret), + 1, XCONC("d"(port)), + VMI_CLOBBER_EXTENDED(ONE_RETURN, "memory")); + return ret; +} + +static inline VMI_UINT16 vmi_inw(const VMI_UINT16 port) +{ + VMI_UINT16 ret; + vmi_wrap_call( + INW, "inw %w0, %%ax", + VMI_OREG1(ret), + 1, XCONC("d"(port)), + VMI_CLOBBER_EXTENDED(ONE_RETURN, "memory")); + return ret; +} + +static inline void vmi_outsl(VMI_UINT32 const *addr, const VMI_UINT16 po...

...n ret; +} + +static inline VMI_UINT8 vmi_inb(const VMI_UINT16 port) +{ + VMI_UINT8 ret; + vmi_wrap_call( + INB, "inb %w0, %%al", + VMI_OREG1(ret), + 1, XCONC("d"(port)), + VMI_CLOBBER_EXTENDED(ONE_RETURN, "memory")); + return ret; +} + +static inline VMI_UINT16 vmi_inw(const VMI_UINT16 port) +{ + VMI_UINT16 ret; + vmi_wrap_call( + INW, "inw %w0, %%ax", + VMI_OREG1(ret), + 1, XCONC("d"(port)), + VMI_CLOBBER_EXTENDED(ONE_RETURN, "memory")); + return ret; +} + +static inline void vmi_outsl(VMI_UINT32 const *addr, const VMI_UINT16 po...

Dear sir; may you drop me some idea how can i get rid of following error message: Error in switch(nmeth, { : NA/NaN/Inf in foreign function call (arg 1) i dont know what does nmeth and ther rest of error message mean? i have a file which contains 460 rows and 174 columns including missing value as NA. Regards, Mostafa

...> + return 0xff; > +#endif > } > } > > @@ -132,8 +142,13 @@ static u16 bochs_dispi_read(struct bochs_device *bochs, u16 reg) > > ret = readw(bochs->mmio + offset); > } else { > +#ifdef HAS_IOPORT > outw(reg, VBE_DISPI_IOPORT_INDEX); > ret = inw(VBE_DISPI_IOPORT_DATA); > +#else > + WARN_ONCE(1, "Non-MMIO bochs device needs HAS_IOPORT"); > + ret = 0xffff; > +#endif > } > return ret; > } > @@ -145,8 +160,12 @@ static void bochs_dispi_write(struct bochs_device *bochs, u16 reg, u16 val) > > w...

...(__u32 __v, __u16 __p) +{ + asm volatile ("outl %0,%1" : : "a" (__v), "dN"(__p)); +} + +static __inline__ __u8 inb(__u16 __p) +{ + __u8 __v; + asm volatile ("inb %1,%0" : "=a" (__v) : "dN"(__p)); + return __v; +} + +static __inline__ __u16 inw(__u16 __p) +{ + __u16 __v; + asm volatile ("inw %1,%0" : "=a" (__v) : "dN"(__p)); + return __v; +} + +static __inline__ __u32 inl(__u16 __p) +{ + __u32 __v; + asm volatile ("inl %1,%0" : "=a" (__v) : "dN"(__p)); + return __v; +} + +/* Stri...

.../* Notify the hypervisor how a page should be shadowed */ \ + VDEF(AllocatePage) \ + /* Release shadowed parts of a page */ \ + VDEF(ReleasePage) \ + VDEF(InvalPage) \ + VDEF(FlushTLB) \ + VDEF(FlushDeferredCalls) \ + VDEF(SetLinearMapping) \ + VDEF(IN) \ + VDEF(INB) \ + VDEF(INW) \ + VDEF(INS) \ + VDEF(INSB) \ + VDEF(INSW) \ + VDEF(OUT) \ + VDEF(OUTB) \ + VDEF(OUTW) \ + VDEF(OUTS) \ + VDEF(OUTSB) \ + VDEF(OUTSW) \ + VDEF(SetIOPLMask) \ + VDEF(DeactivatePxELongAtomic) \ + VDEF(TestAndSetPxELongBit) \ + VDEF(TestAndClearPxELongBit) \ + VDEF(SetIni...

.../* Notify the hypervisor how a page should be shadowed */ \ + VDEF(AllocatePage) \ + /* Release shadowed parts of a page */ \ + VDEF(ReleasePage) \ + VDEF(InvalPage) \ + VDEF(FlushTLB) \ + VDEF(FlushDeferredCalls) \ + VDEF(SetLinearMapping) \ + VDEF(IN) \ + VDEF(INB) \ + VDEF(INW) \ + VDEF(INS) \ + VDEF(INSB) \ + VDEF(INSW) \ + VDEF(OUT) \ + VDEF(OUTB) \ + VDEF(OUTW) \ + VDEF(OUTS) \ + VDEF(OUTSB) \ + VDEF(OUTSW) \ + VDEF(SetIOPLMask) \ + VDEF(DeactivatePxELongAtomic) \ + VDEF(TestAndSetPxELongBit) \ + VDEF(TestAndClearPxELongBit) \ + VDEF(SetIni...

...latile ("outl %0,%1" : : "a" (__v), "dN"(__p)); +} + +static __inline__ unsigned char inb(unsigned short __p) +{ + unsigned char __v; + asm volatile ("inb %1,%0" : "=a" (__v) : "dN"(__p)); + return v; +} + +static __inline__ unsigned short inw(unsigned short __p) +{ + unsigned short __v; + asm volatile ("inw %1,%0" : "=a" (__v) : "dN"(__p)); + return v; +} + +static __inline__ unsigned int inl(unsigned short __p) +{ + unsigned int __v; + asm volatile ("inl %1,%0" : "=a" (__v) : "dN&q...

...ddr)) #endif -unsigned int ioread8(void __iomem *addr) +unsigned int ioread8(const void __iomem *addr) { IO_COND(addr, return inb(port), return readb(addr)); return 0xff; } -unsigned int ioread16(void __iomem *addr) +unsigned int ioread16(const void __iomem *addr) { IO_COND(addr, return inw(port), return readw(addr)); return 0xffff; } -unsigned int ioread16be(void __iomem *addr) +unsigned int ioread16be(const void __iomem *addr) { IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr)); return 0xffff; } -unsigned int ioread32(void __iomem *addr) +unsigned int ior...

...iomem *port, void *dst, unsigned long count) +void ioread8_rep(const void __iomem *port, void *dst, unsigned long count) { while ((unsigned long)dst & 0x3) { if (!count) @@ -254,7 +254,7 @@ EXPORT_SYMBOL(insb); * the interfaces seems to be slow: just using the inlined version * of the inw() breaks things. */ -void ioread16_rep(void __iomem *port, void *dst, unsigned long count) +void ioread16_rep(const void __iomem *port, void *dst, unsigned long count) { if (unlikely((unsigned long)dst & 0x3)) { if (!count) @@ -294,7 +294,7 @@ EXPORT_SYMBOL(insw); * but the interfaces...

...iomem *port, void *dst, unsigned long count) +void ioread8_rep(const void __iomem *port, void *dst, unsigned long count) { while ((unsigned long)dst & 0x3) { if (!count) @@ -254,7 +254,7 @@ EXPORT_SYMBOL(insb); * the interfaces seems to be slow: just using the inlined version * of the inw() breaks things. */ -void ioread16_rep(void __iomem *port, void *dst, unsigned long count) +void ioread16_rep(const void __iomem *port, void *dst, unsigned long count) { if (unlikely((unsigned long)dst & 0x3)) { if (!count) @@ -294,7 +294,7 @@ EXPORT_SYMBOL(insw); * but the interfaces...

...iomem *port, void *dst, unsigned long count) +void ioread8_rep(const void __iomem *port, void *dst, unsigned long count) { while ((unsigned long)dst & 0x3) { if (!count) @@ -300,7 +300,7 @@ EXPORT_SYMBOL(insb); * the interfaces seems to be slow: just using the inlined version * of the inw() breaks things. */ -void ioread16_rep(void __iomem *port, void *dst, unsigned long count) +void ioread16_rep(const void __iomem *port, void *dst, unsigned long count) { if (unlikely((unsigned long)dst & 0x3)) { if (!count) @@ -340,7 +340,7 @@ EXPORT_SYMBOL(insw); * but the interfaces...

...le ("outl %0,%1" : : "a" (__v), "dN" (__p)); +} + +static __inline__ unsigned char inb(unsigned short __p) +{ + unsigned char __v; + asm volatile ("inb %1,%0" : "=a" (__v) : "dN" (__p)); + return __v; +} + +static __inline__ unsigned short inw(unsigned short __p) +{ + unsigned short __v; + asm volatile ("inw %1,%0" : "=a" (__v) : "dN" (__p)); + return __v; +} + +static __inline__ unsigned int inl(unsigned short __p) +{ + unsigned int __v; + asm volatile ("inl %1,%0" : "=a" (__v) : "d...

Hi, Multiple architectures are affected in the first patch and all further patches depend on the first. Maybe this could go in through Andrew Morton's tree? Changes since v2 ================ 1. Drop all non-essential patches (cleanups), 2. Update also drivers/sh/clk/cpg.c . Changes since v1 ================ https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at

Hi, Changes since v1 ================ https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at kernel.org/ 1. Constify also ioreadX_rep() and mmio_insX(), 2. Squash lib+alpha+powerpc+parisc+sh into one patch for bisectability, 3. Add Geert's review, 4. Re-order patches so all optional driver changes are at the end. Description =========== The ioread8/16/32() and others have

Hi, Changes since v1 ================ https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at kernel.org/ 1. Constify also ioreadX_rep() and mmio_insX(), 2. Squash lib+alpha+powerpc+parisc+sh into one patch for bisectability, 3. Add acks and reviews, 4. Re-order patches so all optional driver changes are at the end. Description =========== The ioread8/16/32() and others have

Hi, Changes since v1 ================ https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at kernel.org/ 1. Constify also ioreadX_rep() and mmio_insX(), 2. Squash lib+alpha+powerpc+parisc+sh into one patch for bisectability, 3. Add acks and reviews, 4. Re-order patches so all optional driver changes are at the end. Description =========== The ioread8/16/32() and others have

Hi, Changes since v1 ================ https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at kernel.org/ 1. Constify also ioreadX_rep() and mmio_insX(), 2. Squash lib+alpha+powerpc+parisc+sh into one patch for bisectability, 3. Add acks and reviews, 4. Re-order patches so all optional driver changes are at the end. Description =========== The ioread8/16/32() and others have