Displaying 13 results from an estimated 13 matches for "intrreadargmem".
2014 Apr 07
9
[LLVMdev] 3.4.1 Release Plans
...ix diassembler
> handling of rex.b when mod=00/01/10 and bbb=101. Mod=00 should ignore the
> base register entirely. Mod=01/10 should treat this as R13 plus
> displacment. Fixes PR18860
> 6. r201126 - Robert Khasanov - Changed attributes of all gather intrinsics
> from IntrReadMem to IntrReadArgMem as they access only memory based on
> argument.
>
> Most patches fix different stable issues on X86 target.
>
> Thanks,
> Robert
>
>
>
> 2014-03-26 20:10 GMT+04:00 Tom Stellard <tom at stellard.net>:
>
> > Hi,
> >
> > We are now about h...
2014 Oct 26
2
[LLVMdev] Masked vector intrinsics and name mangling
...gling from these intrinsics:
%res = call <16 x i32> @llvm.masked.load (i32* %addr, <16 x i32>%passthru, i32 4, <16 x i1> %mask)
def int_masked_load :
Intrinsic<[llvm_anyvector_ty], [llvm_anyptr_ty, llvm_anyvector_ty, llvm_anyint_ty, llvm_anyvector_ty],
[IntrReadArgMem, NoNameMangling]>; // new property
It will significantly simplify reading and manual writing.
What do you think?
Thank you.
- Elena
---------------------------------------------------------------------
Intel Israel (74) Limited
This e-mail and any attachments may contain confidenti...
2008 Dec 04
2
[LLVMdev] optimization whith call of Intrinsics
...using different memory banks.
I have written the frontend to generate a valid IR and want to use the
existing passes (as defined in tool opt) to optimize the code.
The target has specific instructions, so following advices given in
documentation, I created an intrinsic function, with attribute
[IntrReadArgMem].
My test case is very simple : I repeat twice a set of instructions and
would like that the optimizer delete the second one;
the set is
{ INSTR 1 : store of data in bank 1;
INSTR 2 : call of intrinsic (read only)
INSTR 3 : store of data in bank 2; }
When calling the intrinsic funct...
2014 Oct 26
2
[LLVMdev] Masked vector intrinsics and name mangling
...<16 x i32> @llvm.masked.load (i32* %addr, <16 x
>>> i32>%passthru, i32 4, <16 x i1> %mask)
>>>
>>> def int_masked_load :
>>> Intrinsic<[llvm_anyvector_ty], [llvm_anyptr_ty, llvm_anyvector_ty,
>>> llvm_anyint_ty, llvm_anyvector_ty], [IntrReadArgMem,
>>> NoNameMangling]>;
>>> // new property
>>>
>>> It will significantly simplify reading and manual writing.
>>> What do you think?
>>
>> We already have this kind of situation for @llvm.memcpy and friends,
>> and while it can mak...
2008 Dec 04
1
[LLVMdev] optimization whith call of Intrinsics
Thanks Eli.
I will try your solution, but then, what is the difference between
[IntrReadArgMem] and
[IntrReadMem] when specifying an intrinsic ? It seems that both options
specify that a function is 'readonly'
(maybe the difference is not well supported for then moment ?)
Julien
> Dead store elimination is that pass that could do the optimizations in
> question. The second...
2016 Mar 21
1
define intrinsic function with pointer-typed parameter
Hi,
If I define a intrinsic function with pointer-typed parameter, for example,
def llvm_foo_ptr_ty : LLVMPointerType<llvm_i16_ty>;
def int_foo_get : Intrinsic<[llvm_foo_ptr_ty], [llvm_foo_ptr_ty,
llvm_i32_ty], [IntrReadArgMem]>;
How to lower it for the backend? I'm not sure what kind of register (i16 or
i32 or i32) is needed in this case? If the parameter is
LLVMPointerType<llvm_i32_ty> instead of LLVMPointerType<llvm_i16_ty>, will
this make difference for the backend? Suppose my backend has three ty...
2008 Dec 04
0
[LLVMdev] optimization whith call of Intrinsics
...ks.
> I have written the frontend to generate a valid IR and want to use the
> existing passes (as defined in tool opt) to optimize the code.
>
> The target has specific instructions, so following advices given in
> documentation, I created an intrinsic function, with attribute
> [IntrReadArgMem].
>
> My test case is very simple : I repeat twice a set of instructions and
> would like that the optimizer delete the second one;
> the set is
> { INSTR 1 : store of data in bank 1;
> INSTR 2 : call of intrinsic (read only)
> INSTR 3 : store of data in bank 2; }
&g...
2015 Oct 22
2
add intrinsic function support for customized backend
Hi, All,
I want to add one intrinsic function for my particular backend. Let's say
the intrinsic function is named "foo" which takes two i32 inputs and has
one i32 output.
First, I add this line "def int_foo : Intrinsic<[llvm_i32_ty],
[llvm_i32_ty, llvm_i32_ty], [IntrReadArgMem]>;" in
/include/llvm/IR/Intrinsics.td.
Then, in my target/InstrInfo.td, I'm supposed to add one pattern to match
this intrinsic function. However, I don't understand how LLVM can tell the
difference between this intrinsic function call and other normal function
calls. From the IR,...
2014 Oct 26
2
[LLVMdev] Masked vector intrinsics and name mangling
...rom these intrinsics:
> %res = call <16 x i32> @llvm.masked.load (i32* %addr, <16 x
> i32>%passthru, i32 4, <16 x i1> %mask)
>
> def int_masked_load :
> Intrinsic<[llvm_anyvector_ty], [llvm_anyptr_ty, llvm_anyvector_ty,
> llvm_anyint_ty, llvm_anyvector_ty], [IntrReadArgMem, NoNameMangling]>;
> // new property
>
> It will significantly simplify reading and manual writing.
> What do you think?
We already have this kind of situation for @llvm.memcpy and friends, and while it can make the IR look verbose at times, we have reasonable interfaces for creat...
2015 Oct 22
2
add intrinsic function support for customized backend
...> instead (at least for the X86 backend). Then, there's many ways to handle
> pseudo-instructions inside a backend.
>
> I will take the X86 backend as an example.
>
> First, your intrinsics:
>
> def int_foo : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
> [IntrReadArgMem]>;
>
> It will be converted into DAG nodes. Then, you can handle it manually
> inside the code or using TableGen mechanism. For the latter, you should
> define a pseudo-instruction that match your
> intrinsic-translated-into-dag-node. The pseudo-instruction definition
> should...
2014 Apr 08
2
[LLVMdev] 3.4.1 Release Plans
...01/10 and bbb=101. Mod=00 should ignore the
> > > base register entirely. Mod=01/10 should treat this as R13 plus
> > > displacment. Fixes PR18860
> > > 6. r201126 - Robert Khasanov - Changed attributes of all gather
> > intrinsics
> > > from IntrReadMem to IntrReadArgMem as they access only memory based on
> > > argument.
> > >
> > > Most patches fix different stable issues on X86 target.
> > >
> > > Thanks,
> > > Robert
> > >
> > >
> > >
> > > 2014-03-26 20:10 GMT+04:00 Tom S...
2011 Oct 24
0
[LLVMdev] Extending Intrinsic Functions
...as argument and transforms the pointer into another one and
returns it. It does not read or write memory. The Intrinsic has
properties: IntrNoMem. Is there any other property I can specify for the
intrinsic function such as idempotent? Looking into the code, these are
the properties: IntrNoMem, IntrReadArgMem, IntrReadMem,
IntrReadWriteArgMem, Commutative and NoCapture. Only IntrNoMem applies
to the intrinsic function. Also, what optimizations might be affected by
an intrinsic function that only transforms a pointer? Is there a way to
pass more information so that LLVM can do even more optimizations...
2014 Mar 26
19
[LLVMdev] 3.4.1 Release Plans
Hi,
We are now about halfway between the 3.4 and 3.5 releases, and I would
like to start preparing for a 3.4.1 release. Here is my proposed release
schedule:
Mar 26 - April 9: Identify and backport additional bug fixes to the 3.4 branch.
April 9 - April 18: Testing Phase
April 18: 3.4.1 Release
How you can help:
- If you have any bug fixes you think should be included to 3.4.1, send
me an