search for: intrnomem

...rinsicsX86.td``. Here are the intrinsics of interest. ``` let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_vcvtph2ps_128 : GCCBuiltin<"__builtin_ia32_vcvtph2ps">, Intrinsic<[llvm_v4f32_ty], [llvm_v8i16_ty], [IntrNoMem]>; def int_x86_vcvtph2ps_256 : GCCBuiltin<"__builtin_ia32_vcvtph2ps256">, Intrinsic<[llvm_v8f32_ty], [llvm_v8i16_ty], [IntrNoMem]>; def int_x86_vcvtps2ph_128 : GCCBuiltin<"__builtin_ia32_vcvtps2ph">, Intrinsic<[llvm_v8i16_t...

My understanding of intrinsics in LLVM is that an optimization pass cannot touch an intrinsic unless it (1) is specifically programmed to have knowledge of the intrinsic, or (2) uses only declared properties of the intrinsic, like IntrNoMem. So, for example, a pass may move an unknown intrinsic around memory ops if its defined IntrNoMem, but it cannot hoist constants for arbitrary intrinsics. Is this correct? I can't find this codified anywhere in the documentation. The context for this question is adding an intrinsic that req...

From: Villmow, Micah Sent: Tuesday, November 06, 2012 1:37 PM To: 'llvm-dev at cs.uiuc.edu' Cc: Guo, Xiaoyi Subject: Bug in SelectionDAG visitTargetIntrinsic We ran into a problem where specifying IntrNoMem was causing our instruction selection to fail with target specific intrinsics. After looking into the code and ISel debug it looks like tablegen and SelectionDAG are using different criteria to generate code for intrinsic_w_chain vs intrinsic_wo_chain. In CodeGenDAGPatterns.cpp, tablegen decides b...

...ed in code: ``` let isPseudo = 1 in let usesCustomInserter = 1 in def BNDMK64rm_Int: PseudoI<(outs BNDR:$dst), (ins i64mem:$src, GR64:$shift), [(set BNDR:$dst, (int_x86_mpx_bndmk addr:$src, i64:$shift))]>; ``` Everything works completely fine, intrinsic gets matched. But if I add "IntrNoMem" attribute to instrinsic like: ``` let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_mpx_bndmk: Intrinsic<[llvm_x86bnd_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrNoMem]>; } ``` All of sudden pattern doesn't get matched. Ho...

...GCCBuiltin to get automatic CBE (and other) support for emitting intrinsics as gcc builtins. It looks like this: def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">, Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>; AVX has 128-bit instructions that work exactly like SSE instructions except they have non-destructive operands. gcc defines intrinsics for 256-bit operations but does not define special intrinsics for 128-bit AVX instructions. So one has to use the SSE intrinsics: def int_x86_avx_vhadd...

...ics that are used by all hw codegen targets. > +// > +//===----------------------------------------------------------------------===// > + > +let TargetPrefix = "AMDGPU", isTarget = 1 in { > + > + def int_AMDGPU_load_const : Intrinsic<[llvm_float_ty], [llvm_i32_ty], [IntrNoMem]>; > + def int_AMDGPU_load_imm : Intrinsic<[llvm_v4f32_ty], [llvm_i32_ty], [IntrNoMem]>; > + def int_AMDGPU_reserve_reg : Intrinsic<[], [llvm_i32_ty], [IntrNoMem]>; > + def int_AMDGPU_store_output : Intrinsic<[], [llvm_float_ty, llvm_i32_ty], [IntrNoMem]>; > + d...

...4 >> 23.  %call21 = call i32 @delta(i32 %tmp15, i32 %tmp16, i32 %tmp18, i32 >> %tmp20) >>   ... >> >> It is compiled by clang 2.9. This BB is an end block in a function. >> Intrinsic function llvm.guard.load.p0i32 is defined as follows: >> let Properties = [IntrNoMem, NoCapture<0>] in { >>     def int_guard_load   : Intrinsic<[llvm_anyptr_ty], [LLVMMatchType<0>]> >> } >> >> Thanks a lot. > > IntrNoMem means that your intrinsic doesn't access memory... I don't > think that is what you want. Well, either...

...; <Micah.Villmow at amd.com> wrote: > > > From: Villmow, Micah > Sent: Tuesday, November 06, 2012 1:37 PM > To: 'llvm-dev at cs.uiuc.edu' > Cc: Guo, Xiaoyi > Subject: Bug in SelectionDAG visitTargetIntrinsic > > We ran into a problem where specifying IntrNoMem was causing our instruction selection to fail with target specific intrinsics. After looking into the code and ISel debug it looks like tablegen and SelectionDAG are using different criteria to generate code for intrinsic_w_chain vs intrinsic_wo_chain. > > In CodeGenDAGPatterns.cpp, tablege...

...ll 22. %tmp20 = load i32* %tv_usec19.safe_r, align 4, !tbaa !4 23. %call21 = call i32 @delta(i32 %tmp15, i32 %tmp16, i32 %tmp18, i32 %tmp20) ... It is compiled by clang 2.9. This BB is an end block in a function. Intrinsic function llvm.guard.load.p0i32 is defined as follows: let Properties = [IntrNoMem, NoCapture<0>] in { def int_guard_load : Intrinsic<[llvm_anyptr_ty], [LLVMMatchType<0>]> } Thanks a lot. Bin -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111006/894fd8b5/attachment...

...c19.safe_r, align 4, !tbaa !4 > 23.  %call21 = call i32 @delta(i32 %tmp15, i32 %tmp16, i32 %tmp18, i32 > %tmp20) >   ... > > It is compiled by clang 2.9. This BB is an end block in a function. > Intrinsic function llvm.guard.load.p0i32 is defined as follows: > let Properties = [IntrNoMem, NoCapture<0>] in { >     def int_guard_load   : Intrinsic<[llvm_anyptr_ty], [LLVMMatchType<0>]> > } > > Thanks a lot. IntrNoMem means that your intrinsic doesn't access memory... I don't think that is what you want. -Eli

...i all, A question about Intrinsic functions and their properties. I am trying some extensions with Intrinsic functions. The intrinsic function takes a pointer as argument and transforms the pointer into another one and returns it. It does not read or write memory. The Intrinsic has properties: IntrNoMem. Is there any other property I can specify for the intrinsic function such as idempotent? Looking into the code, these are the properties: IntrNoMem, IntrReadArgMem, IntrReadMem, IntrReadWriteArgMem, Commutative and NoCapture. Only IntrNoMem applies to the intrinsic function. Also, what optimiz...

Hi Guys, I am trying to promote half to float for my intrinsic math operations, following class and pattern are defined. " class S_HF__HF< string asmstr> : Intrinsic <[llvm_float_ty ], [llvm_float_ty ], [IntrNoMem], !strconcat(asmstr, "_f16")>; def :Pat<( f16 (int_my_math_f16 f16:$src)), (F2Hsr (FEXTsr f16:$src) )>; “ where FEXTsr is implementing the fextend type profile, F2Hsr is implementing as the float to half conversion . “int_my_math_f16” is implementing the “S_HF__HF” p...

...i32 @delta(i32 %tmp15, i32 %tmp16, i32 %tmp18, i32 > >> %tmp20) > >> ... > >> > >> It is compiled by clang 2.9. This BB is an end block in a function. > >> Intrinsic function llvm.guard.load.p0i32 is defined as follows: > >> let Properties = [IntrNoMem, NoCapture<0>] in { > >> def int_guard_load : Intrinsic<[llvm_anyptr_ty], > [LLVMMatchType<0>]> > >> } > >> > >> Thanks a lot. > > > > IntrNoMem means that your intrinsic doesn't access memory... I don't > > th...

...i32 %tmp16, i32 %tmp18, i32 >> >> %tmp20) >> >>   ... >> >> >> >> It is compiled by clang 2.9. This BB is an end block in a function. >> >> Intrinsic function llvm.guard.load.p0i32 is defined as follows: >> >> let Properties = [IntrNoMem, NoCapture<0>] in { >> >>     def int_guard_load   : Intrinsic<[llvm_anyptr_ty], >> >> [LLVMMatchType<0>]> >> >> } >> >> >> >> Thanks a lot. >> > >> > IntrNoMem means that your intrinsic doesn't acce...

...quot;. > - def int_x86_sse42_crc32_8 : GCCBuiltin<"__builtin_ia32_crc32qi">, > + def int_x86_sse42_crc32_32_8 : GCCBuiltin<"__builtin_ia32_crc32qi">, > Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i8_ty], > [IntrNoMem]>; > - def int_x86_sse42_crc32_16 : GCCBuiltin<"__builtin_ia32_crc32hi">, > + def int_x86_sse42_crc32_32_16 : GCCBuiltin<"__builtin_ia32_crc32hi">, > Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i16_ty], >...

I have a variadic intrinsic that is defined as something like this: def int_foobar : Intrinsic<[llvm_anyint_ty], [llvm_vararg_ty], [IntrNoMem, IntrSpeculatable]>; When I construct a call to the above intrinsic with IRBuilder::CreateIntrinsic, it mangles the intrinsic name with the return type (i64) and the actual argument types i32.i32. The mangled name then becomes @llvm.foobar.i64.i32.i32 However this causes the Verifier to...

I have a question about the SSE scalar convert intrinsics. cvtsd2si is defined thusly: def int_x86_sse2_cvtsd2si64 : GCCBuiltin<"__builtin_ia32_cvtsd2si64">, Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>; This matches the signature of the GCC intrinsic. The fact that the GCC intrinsic has a type mismatch on the input (vector rather than scalar) is strange, but ok, we'll run with it. Until this: def Int_CVTSD2SIrm : SDI<0x2D, MRMSrcMem, (outs GR32:$dst), (ins f128mem: $src),...

.../Basic/BuiltinsX86.def : BUILTIN(__builtin_x86_max_qb, "iii", "") In include/llvm/IR/IntrinsicsX86.td : let TargetPrefix = "x86" in { def int_x86_max_qb: GCCBuiltin<"__builtin_x86_max_qb">, Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; } In /lib/Target/X86/X86SelLowering.h: add a sdnode max_qb, In /lib/Target/X86/X86SelLowering.cpp: case X86ISD::max_qb: return "X86ISD::max_qb"; In /lib/Target/X86/X86InstrInfo.td: def X86max_qb_flag : SDNode<"X86ISD::max_qb", SDTBinaryArithWithFlags,...

...ke the following changes.I want that max_qb can find the max of two Integers and return it. In src/include/llvm/IR/Intrinsics.td : let TargetPrefix = "x86" in { def int_x86_max_qb: GCCBuiltin<"__builtin_x86_max_qb">, Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; } In src//tools/clang/include/clang/Basic/BuiltinsX86.def TARGET_BUILTIN(__builtin_x86_max_qb, "V2iV2iV2i", "ncV:64:", "") //I don't know the meaning of these parameters, just write according to the add function. In src/tools/clang/lib/CodeGen/CGBuiltin.cpp....

...ic CBE (and other) > support for emitting intrinsics as gcc builtins.  It looks like > this: > >  def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">, >              Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, >                         llvm_v2f64_ty], [IntrNoMem]>; > > AVX has 128-bit instructions that work exactly like SSE instructions > except they have non-destructive operands.  gcc defines intrinsics for > 256-bit operations but does not define special intrinsics for 128-bit > AVX instructions.  So one has to use the SSE intrinsics: &...