search for: intrinsicsguide

...d? 4) for now we limit ourselves to 8x8 functions, but there are chances we could extend this to bigger inputs/outputs (eg. 32x32 for CRC32-like functions would be nice) Thanks for any help! Regards, [1] https://en.wikipedia.org/wiki/AVX-512#GFNI [2] https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=gf2p&expand=2901 [3] if you wonder why not -mavx512f , see section about current issues below [4] https://software.intel.com/content/www/us/en/develop/articles/intel-software-development-emulator.html [5] https://github.com/aguinet/llvm-project/commit/9ed424cbac0fe3566f801167e2190fad5ad07...

...for these intrinsics, and if provided will be able to handle loops with such cross-iteration dependences. The first step will include the full documentation and implementation of CodeGen part. An additional information about expand load ( https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=expandload&techs=AVX_512 ) and compress store (https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=compressstore&techs=AVX_512 ) you also can find in the Intel Intrinsic Guide. - Elena --------------------------------------------------------------------- Inte...

...able to handle loops |> with such cross-iteration dependences. |> |> The first step will include the full documentation and |implementation |> of CodeGen part. |> |> An additional information about expand load ( |> |https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text= |exp |> andload&techs=AVX_512 |> ) and compress store ( |> |https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text= |com |> pressstore&techs=AVX_512 |> ) you also can find in the Intel Intrinsic Guide. |> |> |> * Elena |...

...s. |> |> |> |> The first step will include the full documentation and |> |implementation |> |> of CodeGen part. |> |> |> |> An additional information about expand load ( |> |> |> ||https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text |= |> |exp |> |> andload&techs=AVX_512 |> |> ) and compress store ( |> |> |> ||https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text |= |> |com |> |> pressstore&techs=AVX_512 |> |> ) you also can f...

...to be enabled to make v64i8 a supported type. The C > intrinsics handling in the front end know this rule. But since you > generated your own intrinsics you bypassed that. Indeed that's the issue... I was stick with what Intel announces here (https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=gf2p&expand=2907), but I guess I should have checked the C intrinsics. I will fix my code to verify the presence of avx512bw if I ever need v64i8. Thanks for the hint!