search for: intriniscs

Displaying 11 results from an estimated 11 matches for "intriniscs".

Did you mean: intrinisics
2013 Oct 25
0
[LLVMdev] Is there pass to break down <4 x float> to scalars
...ort. E.g. ISTR comments about not wanting to rewrite vec_selects because it can be hard to synthesise optimal sequences from a single canonical form. But I might have got that wrong. Also, llvmpipe uses intrinsics for some things, so it might be strange if we decompose IR operations but leave the intriniscs alone. I'd half wondered whether, as an extension, the pass should split wide vectors into supported widths. I hadn't thought about the possiblity of decomposing everything and them reassembling it though. I can see how that would cope with more cases, like you say. Thanks, Richard
2018 Sep 24
4
Writing simple intrinsic in clang
I want to write a simple backend-specific instrinsic that will just call an instruction. How should I do that? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180924/7faeeb3d/attachment.html>
2013 Oct 25
3
[LLVMdev] Is there pass to break down <4 x float> to scalars
On 25 October 2013 11:06, Richard Sandiford <rsandifo at linux.vnet.ibm.com>wrote: > I wanted the same thing for SystemZ, which doesn't have vectors, > in order to improve the llvmpipe code. > Hi Richard, This is a nice patch. I was wondering how hard it'd be to do that, and it seems that you're catching lots of corner cases. My interest is also due to converting odd
2018 Sep 05
2
How to get return address at llvm ir level?
To my knowledge that intrinsic IS generated by frontends like Clang when using _builtin_return_address(), i could be wrong though Zhang > 在 2018年9月5日,10:47,Bekket McClane via llvm-dev <llvm-dev at lists.llvm.org> 写道: > > and
2013 Oct 25
2
[LLVMdev] Is there pass to break down <4 x float> to scalars
...ents about not wanting > to rewrite vec_selects because it can be hard to synthesise optimal > sequences from a single canonical form. But I might have got that wrong. > Also, llvmpipe uses intrinsics for some things, so it might be strange > if we decompose IR operations but leave the intriniscs alone. The issue of intrinsics and vectorization was discussed some time ago. There it might be better to devectorize to a scalar version of the instrinsics (if available) as at least the loopvectorizer can vectorize also a set of selected intrinsics, and the target might have direct machine instr...
2017 Jul 28
2
Addressing TableGen's error "Ran out of lanemask bits" in order to use more than 32 subregisters per register
.../doxygen/html/Function_8cpp.html also */ >> IIT_V128 = 37, >> IIT_V256 = 38 >> }; >> >> I ask because enum IIT_Info has some values that are not >> consecutive for vector types >> for intrinsics (used e.g. in include/llvm/IR/Intriniscs*.td). >> Although not important, I wonder why do I still need to define >> them again (since these >> values are basically already defined in ValueTypes.td) ? >> >> >> So, I managed to get the code compiled. I had issues because I did >> not synch...
2017 Jul 28
0
Addressing TableGen's error "Ran out of lanemask bits" in order to use more than 32 subregisters per register
...t be > defined in llvm.org/docs/doxygen/html/Function_8cpp.html also */ > IIT_V128 = 37, > IIT_V256 = 38 > }; > > I ask because enum IIT_Info has some values that are not consecutive for vector types > for intrinsics (used e.g. in include/llvm/IR/Intriniscs*.td). > Although not important, I wonder why do I still need to define them again (since these > values are basically already defined in ValueTypes.td) ? > > > So, I managed to get the code compiled. I had issues because I did not synchronize the > following code: >...
2013 Oct 25
0
[LLVMdev] Is there pass to break down <4 x float> to scalars
...anting >> to rewrite vec_selects because it can be hard to synthesise optimal >> sequences from a single canonical form. But I might have got that wrong. >> Also, llvmpipe uses intrinsics for some things, so it might be strange >> if we decompose IR operations but leave the intriniscs alone. > > The issue of intrinsics and vectorization was discussed some time ago. > There it might be better to devectorize to a scalar version of the > instrinsics (if available) as at least the loopvectorizer can vectorize > also a set of selected intrinsics, and the target might h...
2020 Jun 24
4
[RFC] `opt-out` attribute list for intrinsics
Hi all, A while back we started annotating intrinsics with new attributes ( https://reviews.llvm.org/D65377) After some discussion it was decided it would be good to have an `opt-out` attribute list for intrinsics. Some attributes that can be added to the list could be: nosync, nofree, nounwind, willreturn For now, there are 2 approaches: 1. Filtering opt-out attributes in tablegen source (
2016 Sep 18
4
Addressing TableGen's error "Ran out of lanemask bits" in order to use more than 32 subregisters per register
Hello. I've managed to patch the various files from the back end related to lanemask - now I have 1024-bit long lanemask. But now I get the following error when giving make llc: <<error:unhandled vector type width in intrinsic!>> This error comes from this file https://github.com/llvm-mirror/llvm/blob/master/utils/TableGen/IntrinsicEmitter.cpp, comes from the
2014 Aug 01
2
[LLVMdev] Clang Integration with MSVS 2013
I just installed the pre-compiled binaries for Clang 3.4.1, which was the latest version I could find to download. Starting a new 'blank' project in MSVC I was easily able to change the tool set from MS Visual Studio 2013 (v120) to LLVM-vs2013. However, trying to compile a simple 'hello world' program resulted in the following compiler errors. Is there something simple I am