search for: intinsics

Displaying 8 results from an estimated 8 matches for "intinsics".

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2016 Jul 28
0
Help wanted: Overloading an Intinsic
Hi David, The error shows that the clang source code uses this intrinsic as well, but in the old form. You need to modify the clang source code (where this intrinsic is used) to consider the overloaded operands. The assert would show the trace where clang uses this intrinsic. Hope this helps, Anna > On Jul 26, 2016, at 3:21 PM, David Noursi via llvm-dev <llvm-dev at lists.llvm.org>
2016 Jul 26
2
Help wanted: Overloading an Intinsic
Hello All, I have been modifying LLVM a project of mine, and have encountered issues with overloading an intrinsic function. I have defined two types, abit (which is mapped, in Intrinsics.td, to i128) and qbit (accordingly mapped to i16). I would like my intrinsic function, CNOT(x,y), to accept either an abit or a qbit for each argument, so I overload with iAny and llvm_anyint_ty, as seemed to
2010 Sep 21
0
[LLVMdev] Vectors in structures
On Sep 21, 2010, at 10:14 AM, Renato Golin wrote: > On 21 September 2010 18:03, Bob Wilson <bob.wilson at apple.com> wrote: >> Because that is what ARM has specified? They define the vector types that are used with their NEON intrinsics as "containerized vectors". Perhaps someone on the list from ARM can explain why they did it that way. > > That's ok, but
2007 Jan 13
1
[LLVMdev] Value* as used by the non-JITted interpreter
Hi all, I've now got my LLVM-based model checker more or less working, but I'm seeing something a bit strange happening. As you may remember, I started with the lli code and extended it considerably. I have retained something that looks vaguely like the original ExecutionContext stack, though I now have one stack per thread, and the whole data structure is implemented with custom
2010 Sep 21
2
[LLVMdev] Vectors in structures
On 21 September 2010 18:03, Bob Wilson <bob.wilson at apple.com> wrote: > Because that is what ARM has specified?  They define the vector types that are used with their NEON intrinsics as "containerized vectors".  Perhaps someone on the list from ARM can explain why they did it that way. That's ok, but why do you need to do that in the IR? I mean, in the end, the
2012 Apr 29
0
[LLVMdev] [PATCH][RFC] Add llvm.codegen Intrinsic To Support Embedded LLVM IR Code Generation
On 04/29/2012 08:28 PM, Evan Cheng wrote: > > On Apr 29, 2012, at 6:37 AM, Tobias Grosser wrote: > >> >> OK, I get what you mean. The intrinsic is currently targeted at the >> OpenCL/CUDA model. It is the most widely used. Stuff like cell sounds >> interesting, but probably needs further thoughts. Even with OpenCL/CUDA, >> this intrinsic works currently only
2012 Apr 29
3
[LLVMdev] [PATCH][RFC] Add llvm.codegen Intrinsic To Support Embedded LLVM IR Code Generation
On Apr 29, 2012, at 6:37 AM, Tobias Grosser wrote: > > OK, I get what you mean. The intrinsic is currently targeted at the > OpenCL/CUDA model. It is the most widely used. Stuff like cell sounds > interesting, but probably needs further thoughts. Even with OpenCL/CUDA, > this intrinsic works currently only for PTX code generation, but I hope > we can gain support for other
2013 Oct 02
5
[LLVMdev] Implementing the ARM NEON Intrinsics for PowerPC
Hello Hal, I am not very familiar with the DSP capabilities of PowerPC, but I imagine there will be instructions for simple vector operations like vector addition, multiplication, etc. so for these I imagine the implementation would consist of just outputting the correct instruction. However, for NEON instructions like the reciprocal step (see