Displaying 20 results from an estimated 163 matches for "intersperse".
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interspersed
2010 Dec 11
5
(S|odf)weave : how to intersperse (\LaTeX{}|odf) comments in source code ? Delayed R evaluation ?
Dear list,
Inspired by the original Knuth tools, and for paedaogical reasons, I wish
to produce a document presenting some source code with interspersed
comments in the source (see Knuth's books rendering TeX and metafont
sources to see what I mean).
I seemed to remember that a code chunk could be defined piecewise, like in
Comments...
<<Chunk1, eval=FALSE, echo=TRUE>>=
SomeCode
@
Some other comments...
<<Chunk2, eval=...
2008 Jul 28
3
Fill in NA values in vector with previous character/factor
I have a vector of data (species names) interspersed with NA values
and I want a function to "fill in the blanks", replacing NA values
with whatever the last species name was.
For example the vector:
"A","B",NA,NA,"C",NA,NA,NA,NA,"D",NA,NA.
should evaluate to:
"A" "B" &q...
2009 Feb 24
2
[LLVMdev] Debug Info Question
Hi,
I want to emit the debug information in assembly through assembler
directives. Also I don't want to emit debug information in sections
(like Dwarf). Instead the debug information will be interspersed with
the assembly. However in LLVM, debug info (e.g. stoppoint) is read and
made part of the DAG only when DwarfWriter is registered.
How can I emit the debug information in assembly with out using
DwarfWriter?
Regards
Sachin
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2018 Sep 11
2
Byte-wide stores aren't coalesced if interspersed with other stores
Hmm. This looks like the backend conservatively giving up early on merging.
It looks like you're running clang 5.02. There have been some improvements
to the backend's memory aliasing and store merging that have landed since.
Can you check if this is fixed in a newer version?
-Nirav
On Tue, Sep 11, 2018 at 2:21 PM, Andres Freund <andres at anarazel.de> wrote:
> Hi,
>
>
2018 Sep 10
2
Byte-wide stores aren't coalesced if interspersed with other stores
...%a03, align 2
%a04 = getelementptr i8, i8* %0, i64 3
store i8 0, i8* %a04, align 1
%2 = bitcast i32* %1 to <4 x i32>*
store <4 x i32> zeroinitializer, <4 x i32>* %2, align 8
ret void
}
but note that the i8 stores *still* haven't been coalesced, although
without the interspersed stores, llc/lowering is able to do so.
If I run another round of opt on it then "MemCpy Optimization" manages
to also optimize this on the IR level:
*** IR Dump After Global Value Numbering ***
; Function Attrs: norecurse nounwind
define void @evalexpr_0_0(i8* noalias nocapture align...
2009 Jan 05
1
X11 on Dell D830 with latest 7.1-PRERELEASE
Hi,
I've got a Dell Latitude D830 running 7.1-PRERELEASE/amd64 which I've
just csup'd to the -STABLE as of 5-Jan-2009, and after going thru' the
std build+install; XOrg now comes up with a blank screen, sometimes
interspersed with green dots. I did test out X prior to doing an
installworld, and that came up with no problems. However, after doing
an installworld, X is now broken.
Prior to this update, the D830 was running -STABLE from Nov-2008;
which appeared to work fine. All ports are up to date.
I'd appreciate...
2020 Feb 05
2
Need advice on migrating from GitHub/llvm-mirror
Hello.
I'm developing a LLVM based project and I'm using a fork of LLVM and Clang
repos from https://github.com/llvm-mirror . The workflow was merging my
work with release_XX branches from these repos, so now I have my commits
interspersed with upstream ones.
I'd be grateful for any advice on how should I move my work towards
official git monorepo. I want to preserve my history, of course.
Thanks in advance.
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2017 Jul 06
2
LLVM's loop strength reduction module
...rstand the code in the file LoopStrengthReduce.cpp but I am making very slow progress.
Is there any additional documentation available that would help me understand the code, like a PPT presentation or a design document or maybe a paper? I did not find anything on the Internet.
There are comments interspersed in the code which are helpful but don't seem sufficient for me to get a good understanding of the code.
Thanks.
Regards,
Venu.
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2008 Mar 08
1
plotting NAs
...ave NAs:
require(zoo)
monthly.dates<- as.Date(c(
"1991-01-31",
"1991-02-28",
"1991-03-31",
"1991-04-30",
"1991-05-30"
))
monthly.only.data<- 1:length(monthly.dates)
# data for these extra dates (daily frequency) do have NAs interspersed with
# non-NA data having monthly frequency:
daily.dates<- seq(as.Date("1991-06-01"), as.Date("1991-07-31"), by=1)
tmp<- zoo(NA, order.by=c(monthly.dates, daily.dates))
z<- cbind(tmp, tmp)
colnames(z)<- NULL
monthly.in.daily.data<- (1:2)/10
z[index(z) %in% monthl...
2008 Sep 15
4
getting data into correct format for summarizing ... reshape, aggregate, or...
......
etc. for all of these.
I have tried reshape and aggregate and I am sure that I am missing something...
below is a naive attempt at making a data frame with the columns in
the correct class- This can be improved also. There are NA in the
real data set, but I didn't know how to randomly intersperse NA in a
created matrix. I hope this makes sense. If it doesn't I will go
back to the drawing board and try and clarify this.
value <- rnorm(30)
RiverMile <- c(rep(215, length.out=10), rep(202, length.out=10),
rep(198, length.out=10))
constituent <- c (rep("a", length.out=5...
2009 Feb 24
1
[LLVMdev] Debug Info Question
Hi,
I want to emit the debug information in assembly through assembler
directives. Also I don't want to emit debug information in sections
(like Dwarf). Instead the debug information will be interspersed with
the assembly. However in LLVM, debug info (e.g. stoppoint) is read and
made part of the DAG only when DwarfWriter is registered.
How can I emit the debug information in assembly with out using
DwarfWriter?
Regards
Sachin
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2009 Feb 24
0
[LLVMdev] Debug Info Question
Sachin,
On Feb 24, 2009, at 12:27 AM, Sachin.Punyani at microchip.com wrote:
> Hi,
>
> I want to emit the debug information in assembly through assembler
> directives. Also I don’t want to emit debug information in sections
> (like Dwarf). Instead the debug information will be interspersed
> with the assembly. However in LLVM, debug info (e.g. stoppoint) is
> read and made part of the DAG only when DwarfWriter is registered.
>
> How can I emit the debug information in assembly with out using
> DwarfWriter?
We are moving in the direction where DwafWriter won'...
2015 Jan 28
1
Cannot get my first WebRTC experiment to work.
...negotiation, but I have
trouble
interpreting the SDP wrt WebRTC and ICE.
1. asterisk seems to be telling sipml5 to send audio to it's public ip
addres, but * sends to 192.168.241.10
2. the asterisk output does show RTP flows to chrome, but there's no sound
from chrome.
I hope someone can intersperse the output with comments?
Thanks,
Antonio
Asterisk console log, and Javascript console output:
http://pastebin.com/dTFTrzg6
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2006 Feb 10
1
Splitting printed output in Sweave
Dear R community,
I'm trying to figure out if there is any way to split the printed output
of some commands, for example summary.lme, so that I can intersperse
comments in Sweave. I don't mind running the command numerous times and
masking various portions of the output, or saving the output as an object
and printing it, but I can't figure out how to do either. Does anyone
have any suggestions?
Cheers
Andrew
Andrew Robinson
Senior Lecturer in...
2006 Jul 08
1
How rsync works
Hi,
I'm translating the document How rsync works to understand exactly how rsync works when it finds modified files. I'm translating "the sender" and I notice a strange fact.
I would like to take an example where a byte is missing in a file.
In facts :
The generator has created a cheksum for the first file to the sender. Then, a checksum is created for the local file beginning
2007 Dec 19
1
[LLVMdev] Conditional Predicate Extraction
...lving temporary
variables (llvm specific), in order to maintain consistent behaviour when
using this information with anyother simulator, it would be better if these
predicates have syntax very similar (or exactly) as that of the high level
language.
The questions are:
1. Is it possible to somehow intersperse IR and highlevel code of the
program (in C or C++).
2. Is it possible to incorporate some optimizations using llvm-gcc to make
the generated IR very close to the high level language, without affecting
the branch information.
Suggestions and answers are welcome.
Regards
Prabhat
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2004 Dec 06
0
a better "source(echo=TRUE)" {was "....how to pause...."}
You might want to have a look at 'source.mvb' & friends in the 'mvbutils' package. It's designed to allow control of nested sourcing, and to allow interspersed data and commands in a single self-contained file. Unlike 'source', 'source.mvb' reads each statement and immediately executes it, before proceeding to the next; hence it has do the parsing to figure out when a statement is complete. It relies on 'pushBack' so doesn't...
2008 Sep 22
1
as.day() Function (zoo question)
...y, but I don't know how
to look at the code so that I can convert it into something I can use.
On top of that I believe that it is probably an S3 method and I
haven't quite gotten that far in my programming experience.
How I want the mean for each day. the real data set has NA s randomly
interspersed.
library(chron)
library(zoo)
t1 <- chron("1/1/2006", "00:00:00")
t2 <- chron("12/31/2006", "23:45:00")
deltat <- times("00:15:00")
tt <- seq(t1, t2, by = times("00:15:00"))
value <- rnorm(35040)
z <- zoo(value, tt)
tha...
2018 Sep 11
2
Byte-wide stores aren't coalesced if interspersed with other stores
Andres:
FWIW, codegen will do the merge if you turn on global alias analysis for it
"-combiner-global-alias-analysis". That said, we should be able to do this
merging earlier.
-Nirav
On Mon, Sep 10, 2018 at 8:33 PM, Andres Freund via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Hi,
>
> On 2018-09-10 13:42:21 -0700, Andres Freund wrote:
> > I have, in postres,
2013 Aug 27
1
Introducing Sippy Cup: SIPp Load Testing Made Easy
...amically generate PCAP audio. If you've ever needed to drive an IVR from SIPp you're probably familiar with the pains - it usually requires capturing an actual call, isolating the RTP, and then giving it to SIPp to play back. Sippy Cup makes that easier by actually generating uLaw silence interspersed with appropriately timed RFC4733 DTMF. That alone has saved us tremendous time when tweaking our load test scenarios.
Blog announcement of the project:
https://mojolingo.com/blog/2013/introducing-sippy-cup-sipp-load-testing-made-easy/
Github sources:
https://github.com/bklang/sippy_cup
Enjoy!...