Displaying 3 results from an estimated 3 matches for "interconversions".
2017 May 02
4
[SPIR-V] SPIR-V in LLVM
> On 2 May 2017, at 8:48 am, Tom Stellard <tstellar at redhat.com> wrote:
> You would probably need to write a new tablegen backend to generate
> instruction tables that would be used outside of LLVM.
I think I need to write one anyway because I need to generate lots of tables other than the instruction table (there are no registers and therefore no register table), at least one
2017 May 03
5
[SPIR-V] SPIR-V in LLVM
>Right, what I was trying to say is that there are more benefits from
>having this not be a target than there is from having it be a target.
Please enumerate them, I have seen none posted so far . The implied “it is what all the the other backends do” w.r.t ISel/MC is at best(worst?) an implementation detail, and I’m still not quite sure why Chandler was so adamant about that. He seemed
2017 Jun 21
4
[SPIR-V] SPIR-V in LLVM
On 06/20/2017 05:41 PM, Neil Hickey wrote:
> Hi all, I'd like to kick this discussion off again, and summarise the points that have been expressed so far.
>
> Firstly, as a member of Khronos, I'd like to state that this would be a very interesting development.
>
Hi Neil,
I am very interested in having a good LLVM IR -> SPIR-V solution, and I
think it's great that