Displaying 6 results from an estimated 6 matches for "integet".
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2013 Jun 23
3
[LLVMdev] Register Class assignment for integer and pointer types
David, thanks for your immediate response.
Since iPTR is a reserved type for tablegen internal use, can you make a
further explanation?
On the other hand, it can be simply treated as a register class assignment
problem during register allocation.
Assume both pointer and integet have a 32 bit width. backend handles it
just as to i32. When it performs register allocation, it can retrieve from
target constraint information about which register class is valid for a
operand, and this is determined by which instruction consumes the operand.
So is there a convienient way to con...
2013 Jun 21
0
[LLVMdev] Register Class assignment for integer and pointer types
We also have this problem, and have added iPTR types to the back end. Our pointers are actually fat pointers, so this also requires tweaking some optimisations (for example, things like to turn GEPs with 64-bit offsets into pointer-sized offsets, but our pointers are larger than any integer type that we support...). Most of the changes are a bit ugly, and I'm loath to upstream them without
2013 Jun 23
0
[LLVMdev] Register Class assignment for integer and pointer types
...; David, thanks for your immediate response.
>
> Since iPTR is a reserved type for tablegen internal use, can you make a further explanation?
>
> On the other hand, it can be simply treated as a register class assignment problem during register allocation.
> Assume both pointer and integet have a 32 bit width. backend handles it just as to i32. When it performs register allocation, it can retrieve from target constraint information about which register class is valid for a operand, and this is determined by which instruction consumes the operand.
>
> So is there a convienient...
2013 Jun 21
3
[LLVMdev] Register Class assignment for integer and pointer types
llvm code generator lowers both integer and pointer types into ixx(say,
i16, i32, i64, ...). This make senses for some optimizations.
However, integer registers and pointer registers is expilicitly
distinguished from each other for some architectures, like TriCore,
Blackfin, and our lab prototype dsp, which accelerates address computation
and memory access.
I have already read this mail thread:
2013 Jun 24
2
[LLVMdev] Register Class assignment for integer and pointer types
...immediate response.
> >
> > Since iPTR is a reserved type for tablegen internal use, can you make a further explanation?
> >
> > On the other hand, it can be simply treated as a register class assignment problem during register allocation.
> > Assume both pointer and integet have a 32 bit width. backend handles it just as to i32. When it performs register allocation, it can retrieve from target constraint information about which register class is valid for a operand, and this is determined by which instruction consumes the operand.
> >
> > So is there a co...
2013 Jun 24
1
[LLVMdev] Register Class assignment for integer and pointer types
...e response.
> >
> > Since iPTR is a reserved type for tablegen internal use, can you make a
> further explanation?
> >
> > On the other hand, it can be simply treated as a register class
> assignment problem during register allocation.
> > Assume both pointer and integet have a 32 bit width. backend handles it
> just as to i32. When it performs register allocation, it can retrieve from
> target constraint information about which register class is valid for a
> operand, and this is determined by which instruction consumes the operand.
> >
> > So...