Displaying 5 results from an estimated 5 matches for "int_x86_sse3_hadd_pd".
Did you mean:
int_x86_sse3_hadd_ps
2010 Sep 12
2
[LLVMdev] GCCBuiltin and Intrinsic Mapping
I've run into an issue specifying intrinsics for AVX.
Right now one can use GCCBuiltin to get automatic CBE (and other)
support for emitting intrinsics as gcc builtins. It looks like
this:
def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty,
llvm_v2f64_ty], [IntrNoMem]>;
AVX has 128-bit instructions that work exactly like SSE instructions
except they have non-destructive operands. gcc defines...
2010 Sep 13
4
[LLVMdev] GCCBuiltin and Intrinsic Mapping
Eli Friedman <eli.friedman at gmail.com> writes:
> int_x86_avx_vhadd_pd_xmm doesn't exist on trunk. Why does it exist on
> your branch if the semantics are exactly equivalent to
> int_x86_sse3_hadd_pd? The register allocator can handle converting to
> three-address form if the target provides the appropriate hooks.
Because in some cases users may want to explicitly use non-VEX encoded
instructions. So we need to differentiate.
-Dave
2010 Sep 12
0
[LLVMdev] GCCBuiltin and Intrinsic Mapping
...12, 2010 at 3:25 PM, David Greene <dag at cray.com> wrote:
> I've run into an issue specifying intrinsics for AVX.
>
> Right now one can use GCCBuiltin to get automatic CBE (and other)
> support for emitting intrinsics as gcc builtins. It looks like
> this:
>
> def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
> Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty,
> llvm_v2f64_ty], [IntrNoMem]>;
>
> AVX has 128-bit instructions that work exactly like SSE instructions
> except they have non-destructive o...
2010 Sep 13
0
[LLVMdev] GCCBuiltin and Intrinsic Mapping
...Mon, Sep 13, 2010 at 8:27 AM, David A. Greene <dag at cray.com> wrote:
> Eli Friedman <eli.friedman at gmail.com> writes:
>
>> int_x86_avx_vhadd_pd_xmm doesn't exist on trunk. Why does it exist on
>> your branch if the semantics are exactly equivalent to
>> int_x86_sse3_hadd_pd? The register allocator can handle converting to
>> three-address form if the target provides the appropriate hooks.
>
> Because in some cases users may want to explicitly use non-VEX encoded
> instructions. So we need to differentiate.
I don't see why one would like to emit 2...
2010 Sep 13
0
[LLVMdev] GCCBuiltin and Intrinsic Mapping
...Mon, Sep 13, 2010 at 8:27 AM, David A. Greene <dag at cray.com> wrote:
> Eli Friedman <eli.friedman at gmail.com> writes:
>
>> int_x86_avx_vhadd_pd_xmm doesn't exist on trunk. Why does it exist on
>> your branch if the semantics are exactly equivalent to
>> int_x86_sse3_hadd_pd? The register allocator can handle converting to
>> three-address form if the target provides the appropriate hooks.
>
> Because in some cases users may want to explicitly use non-VEX encoded
> instructions. So we need to differentiate.
Can you give an example of such a scenario?...