Displaying 5 results from an estimated 5 matches for "int_x86_sse2_add_sd".
2006 Mar 29
1
[LLVMdev] CVS currently broken - don't update
llvm[3]: Building X86.td register information header with tblgen
Included from /usr/home/llvm/obj/../lib/Target/X86/X86.td:100:
Included from /usr/home/llvm/obj/../lib/Target/X86/X86InstrInfo.td:2431:
Parsing /usr/home/llvm/obj/../lib/Target/X86/X86InstrSSE.td:287: Invalid
def 'int_x86_sse2_add_sd'!
gmake[3]: ***
[/usr/home/llvm/obj/lib/Target/X86/Debug/X86GenRegisterInfo.h.inc.tmp]
Error 1
2009 Jun 17
0
[LLVMdev] help with tablegen
...gt;<<P:Predicate_memop>>))
/home/nicholas/llvm-commit/Debug/bin/tblgen: error:
Included from X86.td:128:
Included from X86InstrInfo.td:3964:
Parsing X86InstrSSE.td:1320: In ADDPDrm: Could not infer all types in
pattern!
defm ADD : basic_sse2_fp_binop_rm<0x58, "add", fadd,
int_x86_sse2_add_sd, 1>;
^
I'm hoping someone with backend experience understands why this would
happen. I've looked over the definition of basic_sse2_fp_binop_rm and
can't see any way in which adding MVT::isMetadata should impact it or
the type inference step.
I'm stumped. Does anyone ha...
2009 Mar 24
0
[LLVMdev] Reducing .td redundancy
On Mar 23, 2009, at 5:56 PM, David Greene wrote:
> Is it legal to do something like a !strconcat on a non-string
> entity? That
> is, is there some operation that will let me do this (replace
> SOME_CONCAT with
> an appropriate operator):
I don't get it, can you try a simpler example on me? :)
-Chris
>
>
> (WARNING! Hacked-up tablegen ahead!)
>
>
2009 Mar 24
2
[LLVMdev] Reducing .td redundancy
Is it legal to do something like a !strconcat on a non-string entity? That
is, is there some operation that will let me do this (replace SOME_CONCAT with
an appropriate operator):
(WARNING! Hacked-up tablegen ahead!)
multiclass sse_fp_binop_bitwise_rm<bits<8> opc, string OpcodeStr,
SDNode OpNode> {
// Vector operation emulating scalar (fp)
2009 Mar 24
2
[LLVMdev] Reducing .td redundancy
...:)
Ok, let see if I can construct something.
>From the IntrinsicsX86.td file:
def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
llvm_v4f32_ty], [IntrNoMem, Commutative]>;
def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
llvm_v2f64_ty], [IntrNoMem, Commutative]>;
Untested multiclass! Look for SOME_CONCAT.
multiclass myintrinsics<bits<8> opc, string OpcodeStr, Intrin...