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int_opus_smuls
2013 Apr 16
0
[LLVMdev] Lowering intrinsics / type promotion
...ds. The target only supports 32-bit registers natively but for some operations, only the lower 16 bits are significant.
For example, the SMULS instruction does a 16 x 16 fractional multiply with saturation. I've defined an intrinsic function:
int __builtin_opus_smuls(short a, short b);
def int_opus_smuls : GCCBuiltin<"__builtin_opus_smuls">,
Intrinsic<[llvm_i32_ty], [llvm_i16_ty, llvm_i16_ty],
[IntrNoMem]>;
; ModuleID = 'test.c'
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-n32"
target triple = &q...