Displaying 3 results from an estimated 3 matches for "int_memory_barri".
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int_memory_barrier
2008 Feb 15
2
[LLVMdev] llvm.atomic.barrier implementation
On Feb 15, 2008, at 2:29 PM, Andrew Lenharth wrote:
> On 2/15/08, Andrew Lenharth <andrewl at lenharth.org> wrote:
>> I'll take a hack at the front end support for
>> __sync_synchronize after this goes in.
>
> This is the gcc side of the patch.
Thanks for tackling this Andrew.
Please prepare a patch for LangRef.html that explains what this thing
does :). What
2008 Feb 15
0
[LLVMdev] llvm.atomic.barrier implementation
> Please prepare a patch for LangRef.html that explains what this thing
> does :). What are all those bools? Once that is available I'll
> review the rest of the llvm patch.
http://llvm.org/releases/2.1/docs/LangRef.html#int_memory_barrier
> In the call below, you don't have to pass in 4 i1's. Just passing in
> the intrinsic ID should be fine. The type list is for intrinsics that
> take 'any' as an argument.
The intrinsic takes 4 bools.
> Finally, don't forget the 80 column rule.
Yea, alrea...
2007 Aug 13
0
[LLVMdev] Atomic memory barrier DAG representation
Hello,
I am in the process of implementing the atomic operations and
synchronization constructs in LLVM. The memory synchronization construct
is described at http://llvm.org/docs/LangRef.html#int_memory_barrier and
has the following problem:
There are 15 variations on the memory barrier to handle the various
ordering constraints desired. Most architectures however only have
support for a few of these variations, and the rest are conservatively
lowered to an all out barrier. I would like to represent th...