Displaying 4 results from an estimated 4 matches for "int1024_t".
2016 Sep 08
2
Addressing TableGen's error "Ran out of lanemask bits" in order to use more than 32 subregisters per register
...s/TableGen/CodeGenRegisters.cpp
More exactly, the error comes from the fact the member LaneMask of the classes
CodeGenSubRegIndex and CodeGenRegister is unsigned (i.e., 32 bits). So for every
lane/subregister we require a bit from the type LaneMask.
I plan to use type long (or even type int1024_t from the boost library, header
cpp_int.hpp) for LaneMask and change accordingly the methods handing the type.
Is there are any limitation I am not aware of (maybe in LLVMV's register allocator)
that would prevent me from using more than 32 lanes/subregisters?
Thank you very much,...
2016 Sep 18
4
Addressing TableGen's error "Ran out of lanemask bits" in order to use more than 32 subregisters per register
...pp
> > More exactly, the error comes from the fact the member LaneMask of
> the classes CodeGenSubRegIndex and CodeGenRegister is unsigned (i.e., 32
> bits). So for every lane/subregister we require a bit from the type
> LaneMask.
> > I plan to use type long (or even type int1024_t from the boost
> library, header cpp_int.hpp) for LaneMask and change accordingly the
> methods handing the type.
> >
> > Is there are any limitation I am not aware of (maybe in LLVMV's
> register allocator) that would prevent me from using more than 32
> lanes/subreg...
2017 Jul 28
2
Addressing TableGen's error "Ran out of lanemask bits" in order to use more than 32 subregisters per register
...-dev wrote:
> Hello.
> I come back to this older thread.
>
> As I've said before, I managed to patch the various files from the
> back end related to lanemask in order to support at most 1024 vector
> lanes. For this I am using a 1024-bit long lanemask of type uint1024_t
> from boost::multiprecision, instead of uint32_t. For this I changed the
> following LLVM source files:
> [repository]/llvm/utils/TableGen/CodeGenRegisters.cpp
> [repository]/llvm/utils/TableGen/CodeGenRegisters.h
> [repository]/llvm/utils/TableGen/RegisterInf...
2017 Jul 28
0
Addressing TableGen's error "Ran out of lanemask bits" in order to use more than 32 subregisters per register
Hello.
I come back to this older thread.
As I've said before, I managed to patch the various files from the back end related
to lanemask in order to support at most 1024 vector lanes. For this I am using a 1024-bit
long lanemask of type uint1024_t from boost::multiprecision, instead of uint32_t. For this
I changed the following LLVM source files:
[repository]/llvm/utils/TableGen/CodeGenRegisters.cpp
[repository]/llvm/utils/TableGen/CodeGenRegisters.h
[repository]/llvm/utils/TableGen/RegisterInfoEmitter.cpp
[repos...