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2007 Mar 13
0
[LLVMdev] Writing a backend basic information
...es.td/h, or can I cope with the 17 bit immediate elsewhere by perhaps using an i32? OR, can I handle this elsewhere in codegen/instruction selection more elegantly? Apologies for the naivety of my question. multiclass sabre_inst<string opcodestr, bits<5> opcode> { def rr : InstSABRE< opcode, (ops IntRegs:$dst, IntRegs:$src), !strconcat (opcodestr, " $dst, $src")>; def ri: InstSABRE< opcode, (ops IntRegs:$dst, IntRegs:$src, Imm17:$c), !strconcat (opco...