Displaying 2 results from an estimated 2 matches for "instructioninfoemitt".
Did you mean:
instructioninfoemitter
2018 May 10
2
[RFC] MC support for variant scheduling classes.
...y method
`Target::createMCSubtargetInfo()`.
----
Let's go back to the definition of IsGPRZero using a TIIPredicate.
```
def IsGPRZero : TIIPredicate<"AArch64", "isGPRZero",
AnyOfMCPredicates<[CheckMOVZ, CheckANDW, CheckANDX, CheckCOPY]>>;
```
This is how the InstructionInfoEmitter expands the method in the tablegen'd
class AArch64GenInstrInfo:
```
static bool isGPRZero(const MachineInstr &MI) {
return (
(
(
MI.getOpcode() == AArch64::MOVZWi
|| MI.getOpcode() == AArch64::MOVZXi
)
&& MI.getNumOperands()...
2018 May 10
0
[RFC] MC support for variant scheduling classes.
...edicates.
> <snip>
> What to do next
> ---------------
> I have a series of three patches ready to be sent upstream for review.
>
> The first patch is mostly a no functional change. It introduces the new
> scheduling predicate class in tablegen, and it teaches the
> InstructionInfoEmitter and the SubtargetEmitter how to expand MCSchedPredicate
> definitions.
> The first patch is up for review here: https:://reviews.llvm.org/D46695 <http://reviews.llvm.org/D46695>.
>
> The second patch would teach the SubtargetEmitter how to generate method
> resolveVariantSch...