Displaying 3 results from an estimated 3 matches for "instrld".
2015 Nov 17
2
DFAPacketizer, Scheduling and LoadLatency
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I tried setting
let mayLoad = 1 {
class InstrLD .... {
}
}
But that didn't seem to work. When I looked at the debug output the latency
for the load instruction was set to 1.
However when I changed load itinerary description in the schedule to
def MyTargetItineraries :
..............
InstrItinData<LD, [InstrStage<2, [Branc...
2015 Nov 16
3
DFAPacketizer, Scheduling and LoadLatency
I'm unclear how does DFAPacketizer and the scheduler know a given
instruction is a load.
Here is what I'm talking about
Let's assume my VLIW target is described as follows:
def MyTargetItineraries :
ProcessorItineraries<[Slot0, Slot1], [], [
..............................
InstrItinData<RI, [InstrStage<1, [Slot0, Slot1]>]>,
2016 Jan 06
2
DFAPacketizer, Scheduling and LoadLatency
On Tue, Nov 17, 2015 at 11:15 AM, Krzysztof Parzyszek <
kparzysz at codeaurora.org> wrote:
> On 11/17/2015 12:26 PM, Rail Shafigulin wrote:
>
>>
>> I tried setting
>> let mayLoad = 1 {
>> class InstrLD .... {
>> }
>> }
>>
>> But that didn't seem to work. When I looked at the debug output the
>> latency for the load instruction was set to 1.
>>
>> However when I changed load itinerary description in the schedule to
>>
>> def MyTargetIti...