Displaying 20 results from an estimated 35 matches for "instrcution".
2015 Sep 07
2
Build rpm package for R-MKL
I want to create a clean .rpm package for R built with MKL and ICC. I
follow Fedora instrcutions[0] to create the package. As a base, I use
the R-3.2.2.src.rpm.
I am left with this error:
------------------------------------------
installing R info pages ...
updating '/usr/share/info/dir' ...
make[1]: Leaving directory '/home/poisonivy/rpmbuild/BUILD/R-3.2.2/doc/manual'
+ mv...
2015 Aug 20
2
loop unrolling introduces conditional branch
...unc i64 %indvars.iv.next.2 to i32*
* %exitcond.2 = icmp ne i32 %lftr.wideiv.2, %n*
* br i1 %exitcond.2, label %.lr.ph <http://lr.ph/>, label %._crit_edge*
*}*
As you can see, at the end of BB <label>4 and BB<label>7 there are "add",
"icmp" and "br" instrcutions to check the boundary. I understand this is
for the correctness. However, I would expect the loop unrolling can change
my code to something like this:
*void foo( int n, int array_x[])*
*{*
* int j = n%3;*
* int m = n - j;*
* for (int i=0; i < m; i+=3){*
* array_x[i] = i;*
* ar...
2015 Aug 20
2
loop unrolling introduces conditional branch
...i32*
> * %exitcond.2 = icmp ne i32 %lftr.wideiv.2, %n*
> * br i1 %exitcond.2, label %.lr.ph <http://lr.ph/>, label %._crit_edge*
> *}*
>
> As you can see, at the end of BB <label>4 and BB<label>7 there are "add",
> "icmp" and "br" instrcutions to check the boundary. I understand this is
> for the correctness. However, I would expect the loop unrolling can change
> my code to something like this:
>
> *void foo( int n, int array_x[])*
> *{*
> * int j = n%3;*
> * int m = n - j;*
> * for (int i=0; i < m;...
2015 Sep 08
0
Build rpm package for R-MKL
On 09/07/2015 06:16 AM, arnaud gaboury wrote:
> I want to create a clean .rpm package for R built with MKL and ICC. I
> follow Fedora instrcutions[0] to create the package. As a base, I use
> the R-3.2.2.src.rpm.
>
> I am left with this error:
>
> ------------------------------------------
> installing R info pages ...
> updating '/usr/share/info/dir' ...
> make[1]: Leaving directory '/home/poisonivy/rpm...
2009 Feb 11
0
Asterisk AGX addons compile issues
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Hi,
I think the trick is to download trunk version from svn (see voip-info.org for instrcution).
Regards
2015 Aug 21
2
loop unrolling introduces conditional branch
...%lftr.wideiv.2, %n*
>>> * br i1 %exitcond.2, label %.lr.ph <http://lr.ph/>, label %._crit_edge*
>>> *}*
>>>
>>> As you can see, at the end of BB <label>4 and BB<label>7 there are
>>> "add", "icmp" and "br" instrcutions to check the boundary. I understand
>>> this is for the correctness. However, I would expect the loop unrolling can
>>> change my code to something like this:
>>>
>>> *void foo( int n, int array_x[])*
>>> *{*
>>> * int j = n%3;*
>>>...
1998 Jun 21
3
Question.
For someone that wants to begin securing his or her network. What would be
the starting point ? I guess in sort of a check list format. I mean as of
now Im not administering a network. But in the old company I used to work
for. Security was a big problem there were no polices in place. And in what
ways can one reduce the amount of work it take to keep up with securing and
monitoring a diversed
2015 Sep 08
2
Build rpm package for R-MKL
On Tue, Sep 8, 2015 at 7:36 PM, Tom Callaway <tcallawa at redhat.com> wrote:
> On 09/07/2015 06:16 AM, arnaud gaboury wrote:
>> I want to create a clean .rpm package for R built with MKL and ICC. I
>> follow Fedora instrcutions[0] to create the package. As a base, I use
>> the R-3.2.2.src.rpm.
>>
>> I am left with this error:
>>
>> ------------------------------------------
>> installing R info pages ...
>> updating '/usr/share/info/dir' ...
>> make[1]: Leaving dire...
2005 Sep 26
0
Attempt #2 :Interdomain Trust
Dear All,
I have posted the following "HELP" recently, and seems like no response
afterwards. Anyway, I try to make it short again here:
As instrcuted from the Samba3-HOWTO.pdf Ch 18.4.2:
[root@samba3 var]# net rpc trustdom establish DomainA
Password:
Could not connect to server "DomainA-PDC"
Trust to domain DomainA established
Then, a workstation (WinXP SP2) had
2014 Aug 04
3
[LLVMdev] LLVM AllocaInst and StoreInst
Hi,
I am trying to write a simple interpreter.
I am trying to generate LLVM IR for assignment operation. The code for the
generation part looks like this
llvm::Value* codeGenSymTab(llvm::LLVMContext& context) {
> printf("\n CodeGen SymTab \n");
> Value *num = ConstantInt::get(Type::getInt64Ty(context), aTable.value,
> true);
> Value *alloc = new
2008 Dec 18
3
Asterisk AGX addons compile issues
Has anyone seen this before, and know what is happening?
USER at HOST:~/asterisk/agx-ast-addons# ./build.sh
-- Configuring done
-- Generating done
-- Build files have been written to: /root/asterisk/agx-ast-addons
[ 11%] Building C object CMakeFiles/app_devstate.dir/app_devstate.o
Linking C shared module dist/app_devstate.so
[ 11%] Built target app_devstate
[ 22%] Building C object
2015 Aug 22
2
loop unrolling introduces conditional branch
..., label %.lr.ph <http://lr.ph/>, label
>>>>> %._crit_edge*
>>>>> *}*
>>>>>
>>>>> As you can see, at the end of BB <label>4 and BB<label>7 there are
>>>>> "add", "icmp" and "br" instrcutions to check the boundary. I understand
>>>>> this is for the correctness. However, I would expect the loop unrolling can
>>>>> change my code to something like this:
>>>>>
>>>>> *void foo( int n, int array_x[])*
>>>>> *{*
>...
2008 Jul 03
0
[PATCH] ia64/pv_ops: paravirtualized istruction checker.
...cr.kr =
+ */
+
+/* for intrinsics
+ * ssm psr.i
+ * rsm psr.i
+ * mov = psr
+ * mov = ivr
+ * mov = tpr
+ * mov cr.itm =
+ * mov eoi =
+ * mov rr[] =
+ * mov = rr[]
+ * mov = kr
+ * mov kr =
+ * ptc.ga
+ */
+
+/*************************************************************
+ * define paravirtualized instrcution macros as nop to ingore.
+ * and check whether arguments are appropriate.
+ *************************************************************/
+
+/* check whether reg is a regular register */
+.macro is_rreg_in reg
+ .ifc "\reg", "r0"
+ nop 0
+ .exitm
+ .endif
+ ;;
+ mov \reg = r0...
2008 Jul 03
0
[PATCH] ia64/pv_ops: paravirtualized istruction checker.
...cr.kr =
+ */
+
+/* for intrinsics
+ * ssm psr.i
+ * rsm psr.i
+ * mov = psr
+ * mov = ivr
+ * mov = tpr
+ * mov cr.itm =
+ * mov eoi =
+ * mov rr[] =
+ * mov = rr[]
+ * mov = kr
+ * mov kr =
+ * ptc.ga
+ */
+
+/*************************************************************
+ * define paravirtualized instrcution macros as nop to ingore.
+ * and check whether arguments are appropriate.
+ *************************************************************/
+
+/* check whether reg is a regular register */
+.macro is_rreg_in reg
+ .ifc "\reg", "r0"
+ nop 0
+ .exitm
+ .endif
+ ;;
+ mov \reg = r0...
2008 Jul 10
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
...MTFSF,
+ /// ATOMIC_LOAD_ADD, ATOMIC_CMP_SWAP, ATOMIC_SWAP - These
+ /// correspond to the llvm.atomic.load.add, llvm.atomic.cmp.swap
+ /// and llvm.atomic.swap intrinsics.
+ ATOMIC_LOAD_ADD, ATOMIC_CMP_SWAP, ATOMIC_SWAP,
+
/// LARX = This corresponds to PPC l{w|d}arx instrcution: load and
/// reserve indexed. This is used to implement atomic operations.
LARX,
@@ -160,10 +165,6 @@
/// indexed. This is used to implement atomic operations.
STCX,
- /// CMP_UNRESERVE = Test for equality and "unreserve" if not true. This
- /// is...
2008 Jul 08
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
PPCTargetLowering::EmitInstrWithCustomInserter has a reference
to the current MachineFunction for other purposes. Can you use
MachineFunction::getRegInfo instead?
Dan
On Jul 8, 2008, at 1:56 PM, Gary Benson wrote:
> Would it be acceptable to change MachineInstr::getRegInfo from private
> to public so I can use it from
> PPCTargetLowering::EmitInstrWithCustomInserter?
>
>
2008 Jul 11
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
...MTFSF,
+ /// ATOMIC_LOAD_ADD, ATOMIC_CMP_SWAP, ATOMIC_SWAP - These
+ /// correspond to the llvm.atomic.load.add, llvm.atomic.cmp.swap
+ /// and llvm.atomic.swap intrinsics.
+ ATOMIC_LOAD_ADD, ATOMIC_CMP_SWAP, ATOMIC_SWAP,
+
/// LARX = This corresponds to PPC l{w|d}arx instrcution: load and
/// reserve indexed. This is used to implement atomic operations.
LARX,
@@ -160,10 +165,6 @@
/// indexed. This is used to implement atomic operations.
STCX,
- /// CMP_UNRESERVE = Test for equality and "unreserve" if not true. This
- /// is...
2008 Jul 11
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Hi Gary,
This does not patch cleanly for me (PPCISelLowering.cpp). Can you
prepare a updated patch?
Thanks,
Evan
On Jul 10, 2008, at 11:45 AM, Gary Benson wrote:
> Cool, that worked. New patch attached...
>
> Cheers,
> Gary
>
> Evan Cheng wrote:
>> Just cast both values to const TargetRegisterClass*.
>>
>> Evan
>>
>> On Jul 10, 2008, at 7:36
2008 Jul 10
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Just cast both values to const TargetRegisterClass*.
Evan
On Jul 10, 2008, at 7:36 AM, Gary Benson wrote:
> Evan Cheng wrote:
>> How about?
>>
>> const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass :
>> &PPC:G8RCRegClass;
>> unsigned TmpReg = RegInfo.createVirtualRegister(RC);
>
> I tried something like that yesterday:
>
> const
2008 Jul 10
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Evan Cheng wrote:
> How about?
>
> const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass :
> &PPC:G8RCRegClass;
> unsigned TmpReg = RegInfo.createVirtualRegister(RC);
I tried something like that yesterday:
const TargetRegisterClass *RC =
is64bit ? &PPC::GPRCRegClass : &PPC::G8RCRegClass;
but I kept getting this error no matter how I arranged it: