search for: instr_yx

...two definitions per instruction, so I had: def AllRegs : RegisterClass< ... (add interleave (XRegs, YRegs))>; and in the InstrInfo.td: def Instr_xy: Instruction(outs AllRegs:$dst), (ins XRegs:$src1, YRegs:$src2), "...", [(set AllRegs:$dst, (OpNode XRegs:$src1, YRegs:$src2))] def Instr_yx: Instruction(outs AllRegs:$dst), (ins YRegs:$src1, XRegs:$src2), "...", [(set AllRegs:$dst, (OpNode YRegs:$src1, XRegs:$src2))] for each instruction. However, upon failing the first match, it insisted on swapping the registers between the two classes and sticking with that instruction....